Updated on 2022/09/16

 
NOMURA Osamu
 
Affiliation
Graduate School of Life Science and Systems Engineering Department of Human Intelligence Systems
Job
Specially Appointed Professor

Research Interests

  • Neural networks

  • Spiking neural networks

  • Neuromorphic computing

  • Reservoir computing

  • LSI

  • Analog computing

  • AI

Degree

  • 東京工業大学  -  博士(理学)   2020.03

  • 九州工業大学  -  博士(工学)   2006.03

Biography in Kyutech

  • 2021.08
     

    Kyushu Institute of Technology   Graduate School of Life Science and Systems Engineering   Department of Human Intelligence Systems   Specially Appointed Professor  

Papers

  • Robustness Of Spiking Neural Networks Based On Time-To-First-Spike Encoding Against Adversarial Attacks Reviewed International journal

    O. Nomura, Y. Sakemi, T. Hosomi, T. Morie

    the 65th IEEE International Midwest Symposium on Circuits and Systems ( IEEE )   2022.08

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    Authorship:Lead author   Language:English   Publishing type:Research paper (international conference proceedings)

  • A Chaotic Boltzmann Machine Working as a Reservoir and Its Energy-Efficient LSI Implementation

    Osamu Nomura, Takashi Morie, Hakaru Tamukoh, Ichiro Kawashima, Kazuo Nakahara, Yuichi Katori

    2022.08

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    Authorship:Lead author   Language:Japanese   Publishing type:Research paper (conference, symposium, etc.)

    日本   広島  

  • Robustness of Spiking Neural Networks based on Time-To-First-Spike Encoding against Adversarial Attacks Reviewed International journal

    O. Nomura, Y. Sakemi, T. Hosomi, T. Morie

    IEEE Trans. Circuits and Systems II ( IEEE )   2022.06

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    Authorship:Lead author   Language:English   Publishing type:Research paper (scientific journal)

    DOI: 10.1109/TCSII.2022.3184313

  • Energy-Efficient Convolution Module With Flexible Bit-Adjustment Method and ADC Multiplier Architecture for Industrial IoT Reviewed International journal

    Tao Li,Yitao Ma,Ko Yoshikawa,Osamu Nomura,Tetsuo Endoh

    IEEE Transactions on Industrial Informatics ( IEEE )   18 ( 5 )   3055 - 3065   2022.05

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    Language:English   Publishing type:Research paper (scientific journal)

    Offloading the unprecedented growing data to the edge exhibits a mainstream trend in the Industrial Internet of Things (IIoT) era, delivering far-reaching impacts in all aspects of our daily lives, including transportation, health care, and entertainment. However, voluminous data analyzes and processing at the edge will unavoidably raise the edge processor's burden and dramatically expand its design complexity and energy dissipation. This article proposes a flexible bit-adjustment-based energy-efficient convolution module with an approximate divide-and-conquer (ADC) multiplier for compact and low-power edge processor design. The maximum distribution search technique is utilized to exploit the optimal fixed-point representation format for both input and output of the convolution module. The neural network manifests the same precision as a 32-b floating-point multiplication deploying the determined representation formats. An ADC multiplier is proposed to realize the convolution module by eliminating the high-bit multiplication between weights and feature maps. The dynamic power consumption of the ADC multiplier-based convolution module with the Q(6,9) input and Q(7,8) output representation formats is 3.85% lower than that of the 16-b signed multiplication circuit. Furthermore, the dynamic power consumption with Q(6,9) input is capable of being decreased by 15.38% for the 16-b convolution if the output is represented by the Q(1,14) format and by up to 39.93% for the 64-b multiplication. The practical verification system of the convolution module working on a field-programmable gate array evaluation board exhibits an outstanding low-power characteristic.

    DOI: 10.1109/TII.2021.3106242

  • Development of quantization YOLO model and WER tolerance evaluation for VC-MRAM implementation

    YOENGJYE YEOH, Hakaru Tamukoh, Osamu Nomura, Hiroko Arai, Hiroshi Imamura, Takashi Morie

    第69回 応用物理学会春季学術講演会   2022.03

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    Language:Japanese   Publishing type:Research paper (conference, symposium, etc.)

  • Numerical Simulation for Analog VLSI Implementation of Reinforcement Learning Using Reservoir Computing Reviewed

    K. Tamai, K. Kawazoe, Y. Shishido, Y. Katori, H. Tamukoh, O. Nomura, T. Morie

    The 3rd International Symposium on Neuromorphic AI Hardware   2022.03

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    Language:English   Publishing type:Research paper (international conference proceedings)

  • A Co-Design Environment for AI Hardware Simulation Using PyLTSpice Reviewed

    Y. Shishido, K. Kawazoe, K. Tamai, Y. Katori, H. Tamukoh, O. Nomura, T. Morie

    The 3rd International Symposium on Neuromorphic AI Hardware   2022.03

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    Language:English   Publishing type:Research paper (international conference proceedings)

  • Memory Capacity of Reservoir Computing Using Chaotic Boltzmann Machines Reviewed

    K. Nakahara, Y. Katori, H. Tamukoh, O. Nomura, T. Morie

    The 3rd International Symposium on Neuromorphic AI Hardware   2022.03

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    Language:English   Publishing type:Research paper (international conference proceedings)

  • A Memory-based LSI Architecture for Entorhinal-hippocampal Model Reviewed

    O. Nomura, I. Kawashima, S. Uenohara, Y. Tanaka, A. Mizutani, K. Takada, K. Tateno, H. Tamukoh, T. Morie

    The 3rd International Symposium on Neuromorphic AI Hardware   2022.03

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    Authorship:Lead author   Language:English   Publishing type:Research paper (international conference proceedings)

  • A Co-design Environment for Computational Models and Circuits Using PyLTSpice and Its Application to Circuit Design for Reinforcement Learning Using Reservoir Computing Reviewed

    Y. Shishido, K. Kawazoe, K. Tamai, Y. Katori, H. Tamukoh, O. Nomura, T. Morie

    The 10th RIEC Int. Symp. on Brain Functions and Brain Computer (BFBC2022)   2022.02

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    Language:English   Publishing type:Research paper (international conference proceedings)

  • Numerical Simulation for VLSI Implementation of Reinforcement Learning Using Reservoir Computing Reviewed

    K. Tamai, K. Kawazoe, Y. Shishido, Y. Katori, H. Tamukoh, O. Nomura, T. Morie

    The 10th RIEC Int. Symp. on Brain Functions and Brain Computer (BFBC2022)   2022.02

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    Language:English   Publishing type:Research paper (international conference proceedings)

  • 不揮発性アナログメモリの適用を目指したリザバー計算に基づく強化学習回路の設計

    川添皓平,玉井克典,宍戸優樺,香取勇一,田向権,野村修,森江隆

    電気学会 電子回路研究会   2021.12

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    Language:Japanese   Publishing type:Research paper (conference, symposium, etc.)

  • Design of a VLSI circuit with non-volatile analog memory for reinforcement learning using reservoir computing Reviewed

    K. Kawazoe, Y. Katori, H. Tamukoh, O. Nomura, T. Morie

    9th International Symposium on Applied Engineering and Sciences (SAES2021)   2021.12

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    Language:English   Publishing type:Research paper (international conference proceedings)

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Conference Prsentations (Oral, Poster)

Industrial Property

  • 演算処理装置

    川島 一郎,田向 権,森江 隆,立野 勝巳,野村 修

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    Application no:特願2022-063290  Date applied:2022.04.06

  • 演算処理装置

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    Application no:特願2022-033282  Date applied:2022.03.04

Activities of Academic societies and Committees

  • ニューロモルフィックAIハードウェア研究センター   運営委員