Lectures -
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Power-Aware Testing for Low-Power VLSI Circuits
特別講演会 2012.03
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Power-Aware Testing for Low-Power VLSI Circuits
2011.12 ECE Seminar, University of Connecticut
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Low-Power Testing for Low-Power Devices
2011.10 Hong Kong Chinese University
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Power-Aware Test for Low-Power Devices
AMD Tech Forum: KGD Track 2011.01 AMD
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Low-Aware Test for Low-Power Devices
MAP 2010 2010.11 MAP
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Low-Aware Test for Low-Power Devices
DFT 2010 2010.10 DFT
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Serhcing for High and Low for the Right Test
LPonTR 2010 2010.05 LPonTR
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Power-Aware Test for Low-Power LSI Circuits
CMOS 2010 2010.05 CMOS
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Low-Power Test and Noise-Aware Test: Foes or Friends
VTS 2010 2010.04 VTS
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Challenges and Chances in Deep-Submicron LSI Testing
Academic Forum on Computer Science and Technology 2010.03 Shanghai University
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省電力志向テスト技術(Power-Aware Testing) の現状と課題
第4回 四国シリコンテスト技術研究会 2010.02 四国シリコンテスト技術研究会
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Is Low Power Testing Necessary? What does the Test Industry Truly Need? --> Real Issues and Available Solutions
ATS 2009 2009.11 ATS
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From Artillery Fire to Sniper Fire: A Paradigm Shift in Test Power Reduction
ITC 2009 2009.11 ITC
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Low-Power Test Generation for Reducing Yield Loss Risk in At-Speed Scan Testing
特別講演会 2009.10
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VLSIの低消費電力テスト技術
半導体テスト技術交流会 2009.02 大分県LSIクラスター推進会議
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低消費電力テスト： 現状と展望
アドバンテスト展2008 テクニカルセミナー 2008.06 ㈱アドバンテスト
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Test Power: A Devil or an Angel?
China Test Conference 2008 2008.05 China Test Conference組織委員会
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Challenges and Chances in Deep-Submicron LSI Testing
特別講演会 2008.04
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Test Strategies for Low Power Devices
DATE 2008 2008.03 DATE 2008 組織委員会
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SIAT：Signal-Integrity-Aware Testing
STS(SEMI テクノロジーシンポジウム) 2007.12 SEMICON JAPAN