Updated on 2022/08/23

写真a

 
MORIE Takashi
 
Scopus Paper Info  
Total Paper Count: 0  Total Citation Count: 0  h-index: 10

Citation count denotes the number of citations in papers published for a particular year.

Affiliation
Graduate School of Life Science and Systems Engineering Department of Human Intelligence Systems
Job
Specially Appointed Professor
Phone
+81-93-695-6122
Fax
+81-93-695-6014
External link

Research Interests

  • Nanodevices

  • Brain-like integrated systems

Research Areas

  • Informatics / Soft computing

Undergraduate Education

  • 1979.03   Osaka University   Faculty of Science   Physics   Graduated   Japan

Post Graduate Education

  • 1981.03   Osaka University   Graduate School, Division of Natural Science   Physics   Master's Course   Completed   Japan

Degree

  • Hokkaido University  -  Doctor of Engineering   1996.09

Biography in Kyutech

  • 2022.04
     

    Kyushu Institute of Technology   Graduate School of Life Science and Systems Engineering   Department of Human Intelligence Systems   Specially Appointed Professor  

  • 2014.04
    -
    2022.03
     

    Kyushu Institute of Technology   Graduate School of Life Science and Systems Engineering   Department of Human Intelligence Systems   Professor  

  • 2002.04
    -
    2014.03
     

    Kyushu Institute of Technology   Graduate School of Life Science and Systems Engineering   Department of Brain Science and Engineering   Professor  

Biography before Kyutech

  • 2001.04 - 2002.03   Graduate school of Advanced sciences of Matter, Hiroshima University   Associate Professor (as old post name)   Japan

  • 1997.04 - 2001.03   Faculty of Engineering, Hiroshima University   Associate Professor (as old post name)   Japan

  • 1981.04 - 1997.03   NTT Laboratories   Research staff   Japan

Academic Society Memberships

  • 2004.04   IEEE   United States

  • 1990.05   The institue of electronics, information and communication engineers (IEICE)   Japan

  • 1990.04   日本神経回路学会   Japan

  • 1982.08   応用物理学会   Japan

  • 2016.06   北九州産業学術推進機構 ひびきのAI社会実装研究会   Japan

Papers

  • Robustness of Spiking Neural Networks based on Time-To-First-Spike Encoding against Adversarial Attacks Reviewed International journal

    Nomura O., Sakemi Y., Hosomi T., Morie T.

    IEEE Transactions on Circuits and Systems II: Express Briefs   2022.06

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    DOI: 10.1109/TCSII.2022.3184313

    Scopus

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  • A Memory-Based Entorhinal-Hippocampal Model and its FPGA Implementation by On-Chip RAMs Reviewed International journal

    I. Kawashima, K. Tateno, T. Morie, H. Tamukoh

    Int. Symp. on Circuits and Systems (ISCAS 2022) ( IEEE )   2022.05

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    Language:English   Publishing type:Research paper (international conference proceedings)

  • A Spiking Neural Network with Resistively Coupled Synapses Using Time-to-First-Spike Coding Towards Efficient Charge-Domain Computing Reviewed International journal

    Y. Sakemi, K. Morino, T. Morie, T. Hosomi, K. Aihara

    Int. Symp. on Circuits and Systems (ISCAS 2022) ( IEEE )   2022.05

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    Language:English   Publishing type:Research paper (international conference proceedings)

  • A Neural Network Model of the Entorhinal Cortex and Hippocampus for Event-Order Memory Processing Reviewed International journal

    Nakagawa H., Tateno K., Takada K., Morie T.

    IEEE Access   10   43003 - 43012   2022.04

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    Authorship:Last author   Language:English   Publishing type:Research paper (scientific journal)

    DOI: 10.1109/ACCESS.2022.3168715

    Scopus

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  • An area-efficient multiply-accumulation architecture and implementations for time-domain neural processing Reviewed International journal

    Kawashima I., Katori Y., Morie T., Tamukoh H.

    International Conference on Field-Programmable Technology (ICFPT 2021)   2021.12

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    Language:English   Publishing type:Research paper (international conference proceedings)

    DOI: 10.1109/ICFPT52863.2021.9609809

    Scopus

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  • Brain-inspired neural network navigation system with hippocampus, prefrontal cortex, and amygdala functions Reviewed International journal

    Mizutani A., Tanaka Y., Tamukoh H., Katori Y., Tateno K., Morie T.

    International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2021)   2021.11

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    Authorship:Last author   Language:English   Publishing type:Research paper (international conference proceedings)

    DOI: 10.1109/ISPACS51563.2021.9651058

    Scopus

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  • A Supervised Learning Algorithm for Multilayer Spiking Neural Networks Based on Temporal Coding Toward Energy-Efficient VLSI Processor Design Reviewed International journal

    Sakemi Y., Morino K., Morie T., Aihara K.

    IEEE Transactions on Neural Networks and Learning Systems ( IEEE )   2021.07

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    Language:English   Publishing type:Research paper (scientific journal)

    DOI: 10.1109/TNNLS.2021.3095068

    Scopus

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  • An Energy-efficient Time-domain Analog CMOS BinaryConnect Neural Network Processor Based on a Pulse-width Modulation Approach Reviewed International journal

    Yamaguchi M., Iwamoto G., Nishimura Y., Tamukoh H., Morie T.

    IEEE Access   2020.12

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    DOI: 10.1109/ACCESS.2020.3047619

    Scopus

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  • An Amygdala-Inspired Classical Conditioning Model Implemented on an FPGA for Home Service Robots Reviewed International journal

    Tanaka Y., Morie T., Tamukoh H.

    IEEE Access   8   212066 - 212078   2020.11

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    Language:English   Publishing type:Research paper (scientific journal)

    DOI: 10.1109/ACCESS.2020.3038161

    Scopus

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  • FPGA implementation of hardware-oriented chaotic Boltzmann machines Reviewed International journal

    Kawashima I., Morie T., Tamukoh H.

    IEEE Access   8   204360 - 204377   2020.11

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    Language:English   Publishing type:Research paper (scientific journal)

    DOI: 10.1109/ACCESS.2020.3036882

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  • A Time-domain Analog Weighted-sum Calculation Circuit Using Ferroelectric-gate Field-effect Transistors for Artificial Intelligence Processors Invited Reviewed International journal

    M, Harada, M, Takahashi, S. Sakai, T. Morie

    Japanese Journal of Applied Physics   59 ( 4 )   040604-1 - 040604-12   2020.04

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    Authorship:Corresponding author   Language:English   Publishing type:Research paper (scientific journal)

    DOI: 10.35848/1347-4065/ab7ff1

  • A Chaotic Boltzmann Machine Working as a Reservoir and Its Analog VLSI Implementation Reviewed

    Yamaguchi M., Katori Y., Kamimura D., Tamukoh H., Morie T.

    Proceedings of the International Joint Conference on Neural Networks   2019-July   2019.07

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    Authorship:Corresponding author   Language:English   Publishing type:Research paper (international conference proceedings)

    DOI: 10.1109/IJCNN.2019.8852325

    Scopus

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  • Neuromorphic systems and physical devices Invited Reviewed

    Takashi Morie

    Oyo Buturi ( The Japan Society of Applied Physics )   88 ( 7 )   481 - 485   2019.07

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    Authorship:Lead author, Corresponding author   Language:Japanese   Publishing type:Article, review, commentary, editorial, etc. (scientific journal)

    <p>This article describes the significance, history, and current positioning of neuromorphic systems and spiking neuron models, which are closely related to artificial intelligence (AI). This article also describes what processing models are being proposed and what devices are required to realize them. We hope that it will give a hint as to how materials and devices in the field of applied physics can contribute to AI.</p>

    DOI: 10.11470/oubutsu.88.7_481

    CiNii Article

    Other Link: https://ci.nii.ac.jp/naid/130007709468

  • Reservoir Computing Based on Dynamics of Pseudo-Billiard System in Hypercube Reviewed

    Katori Y., Tamukoh H., Morie T.

    Proceedings of the International Joint Conference on Neural Networks   2019-July   2019.07

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    Language:English   Publishing type:Research paper (international conference proceedings)

    DOI: 10.1109/IJCNN.2019.8852329

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  • Live demonstration: A VLSI implementation of time-domain analog weighted-sum calculation model for intelligent processing on robots Reviewed International journal

    Yamaguchi M., Iwamoto G., Abe Y., Tanaka Y., Ishida Y., Tamukoh H., Morie T.

    IEEE International Symposium on Circuits and Systems (ISCAS 2019)   2019-May   2019.05

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    Authorship:Corresponding author   Language:English   Publishing type:Research paper (international conference proceedings)

    DOI: 10.1109/ISCAS.2019.8702222

    Scopus

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  • A CMOS Chaotic Boltzmann Machine Circuit and Three-neuron Network Operation Reviewed International journal

    M. Yamaguchi, H. Tamukoh, H. Suzuki, T. Morie

    Proc. Int. Joint Conf. on Neural Networks (IJCNN 2017)   1218 - 1224   2017.06

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    USA   Anchorage   2017.06.14  -  2017.06.19

  • Silicon Nanodisk Array with a Fin Field-effect Transistor for Time-domain Weighted Sum Calculation toward Massively Parallel Spiking Neural Networks,, Reviewed International journal

    T. Tohara, H. Liang, H. Tanaka, M. Igarashi, S. Samukawa, K. Endo, Y. Takahashi, T. Morie

    Applied Physics Express   Vol. 9 ( No. 3 )   034201   2016.02

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    DOI: 10.7567/APEX.9.034201

    CiNii Article

  • Parameterized Digital Hardware Design of Pulse-coupled Phase Oscillator Networks Reviewed International journal

    Y. Suedomi, H. Tamukoh, K. Matsuzaka, M. Tanaka, T. Morie

    Neurocomputing   165   54 - 62   2015.10

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    DOI: 10.1016/j.neucom.2014.07.084

    Scopus

  • A PWM-mode Pixel-parallel Image Processing Circuit Performing Directional State-propagation and Its Application to Subjective Contour Generation Reviewed International journal

    Y. Kim, T. Morie

    Circuits, Systems & Signal Processing   34 ( 2 )   605 - 623   2015.02

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    Authorship:Last author, Corresponding author   Language:English   Publishing type:Research paper (scientific journal)

    DOI: 10.1007/s00034-014-9871-9

    Scopus

  • VLSI Implementation of a Coupled MRF Model Using Pulse-coupled Phase Oscillators Reviewed International journal

    K. Matsuzaka, H. Tanaka, S. Ohkubo, T. Morie

    Electronics Letters   51 ( 1 )   46 - 48   2015.01

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    DOI: 10.1049/el.2014.2105

    Scopus

  • Single-electron Devices and Circuits Utilizing Stochastic Operation for Intelligent Information Processing Invited Reviewed International journal

    T. Morie

    Int. J. of Nanotechnology and Molecular Computation   1 ( 2 )   1 - 28   2009.04

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  • A Subjective-Contour Generation LSI System with Expandable Pixel-Parallel Architecture for Vision Systems, Reviewed International journal

    T. Morie,Y. Kim

    IEEE Int. Solid-State Circuits Conf. (ISSCC2009)   478 - 479   2009.02

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    USA   San Francisco   2009.02.11  -  2009.02.11

  • An efficient hardware-oriented dropout algorithm Reviewed International journal

    Neurocomputing   427   191 - 200   2021.02

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    Language:English   Publishing type:Research paper (scientific journal)

    DOI: 10.1016/j.neucom.2020.11.055

    Scopus

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  • FPGA Implementation and Verification of Reservoir Computing Based on Pseudo-Billiard Dynamics in Hypercube Reviewed

    D. Yamamoto, I. Kawashima, H. Tamukoh, T. Morie, Y. Katori

    Proc. of the 2020 Int. Symp. on Nonlinear Theory and Its Applications (NOLTA2020)   264 - 264   2020.11

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  • A Reservoir Based Q-learning Model for Autonomous Mobile Robots Reviewed

    M. Inada, Y. Tanaka, H. Tamukoh, K. Tateno, T. Morie, Y. Katori

    Proc. of the 2020 Int. Symp. on Nonlinear Theory and Its Applications (NOLTA2020)   213 - 216   2020.11

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  • Performance Evaluation of Reservoir Computing Using Pseudo-billiard Dynamics in Hypercube Reviewed

    D. Kamimura, Y. Katori, H. Tamukoh, and T. Morie

    Proc. of the 2020 Int. Symp. on Nonlinear Theory and Its Applications (NOLTA2020)   135 - 135   2020.11

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  • A Brain-inspired Artificial Intelligence Model of Hippocampus, Amygdala, and Prefrontal Cortex on Home Service Robots Reviewed

    Y. Tanaka, H. Tamukoh, K. Tateno, Y. Katori, T. Morie

    Proc. of the 2020 Int. Symp. on Nonlinear Theory and Its Applications (NOLTA2020)   138 - 141   2020.11

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    Language:English   Publishing type:Research paper (international conference proceedings)

  • A Reservoir Computing System Using a CMOS Chaotic Boltzmann Machine Chip Controlled by SoC FPGA Reviewed

    Y. Nishimura, M. Yamaguchi, D. Kamimura, H. Tamukoh, T. Morie

    Proc. of the 2020 Int. Symp. on Nonlinear Theory and Its Applications (NOLTA2020)   137 - 137   2020.11

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  • A Hippocampus Model for Episodic Memory Processing Using Associative Memory Reviewed

    H. Nakagawa, K. Tateno, K. Takada, T. Morie

    Proc. of the 2020 Int. Symp. on Nonlinear Theory and Its Applications (NOLTA2020)   136 - 136   2020.11

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  • A Supervised Learning Algorithm for Multilayer Spiking Neural Networks Based on Temporal Coding Toward Energy-Efficient VLSI Processor Design International journal

    Y. Sakemi, K. Morino, T. Morie, K. Aihara

    arXiv.org   2020.01

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    Language:English   Publishing type:Research paper (bulletin of university, research institution)

  • An Energy-efficient Time-domain Analog VLSI Neural Network Processor Based on a Pulse-width Modulation Approach International journal

    M. Yamaguchi, G. Iwamoto, H. Tamukoh, T. Morie

    arXiv.org   1810.06819   2019.02

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  • A Time-domain Analog Weighted-sum Calculation Model for Extremely Low Power VLSI Implementation of Multi-layer Neural Networks International journal

    Q. Wang, H. Tamukoh, T. Morie

    arXiv.org   1810.06819   2018.10

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  • Spike-based Time-domain Weighted-sum Calculation Using Nanodevices for Low Power Operation Invited Reviewed

    T. Morie, H. Liang, T. Tohara, H. Tanaka, M. Igarashi, S. Samukawa, K. Endo, Y. Takahashi

    16th Int. Conf. on Nanotechnology (IEEE NANO)   390 - 392   2016.08

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    Japan   Sendai  

  • Measurement and Analysis of a CMOS Chaotic Spiking Oscillator Circuit That Acts as a Filter of Spike Trains Reviewed

    M. Yamaguchi, S. Uenohara, T. Morie, H. Tamukoh, K. Aihara,

    Proc. of the 2015 Int. Symp. on Nonlinear Theory and its Applications (NOLTA2015)   515 - 518   2015.12

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    China   Hong Kong   2015.12.01  -  2015.12.04

  • A CMOS Circuit for PWM-mode Nonlinear Transformation Robust to Device Mismatches to Implement Coupled Map Lattice Models Reviewed

    Nonlinear Theory and Its Applications, IEICE   6 ( 4 )   570 - 581   2015.10

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    CiNii Article

  • VLSI Pulse-Coupled Phase Oscillator Networks and Their Emulator toward Spike-based Computation for Intelligent Processing Invited Reviewed

    H. Tamukoh, Y. Suedomi, K. Matsuzaka, T. Morie

    Ext. Abstracts of Int. Conf. on Solid State Devices and Materials (SSDM 2015)   806 - 807   2015.09

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    Japan   Sapporo   2015.09.27  -  2015.09.30

  • Shadow Detection and Elimination Using a Light-source Color Vector and Its Application to In-vehicle Camera Images Reviewed

    M. Tanaka, T. Morie

    International Journal of Innovative Computing, Information and Control   11 ( 3 )   865 - 879   2015.06

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  • A Silicon Nanodisk Array Structure Realizing Synaptic Response of Spiking Neuron Models with Noise Invited Reviewed

    T. Morie, H. Liang, Y. Sun, T. Tohara, M. Igarashi, S. Samukawa

    The 19th Asia and South Pacific Design Automation Conference   185 - 190   2014.01

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    Singapore   2014.01.20  -  2014.01.23

    DOI: 10.1109/ASPDAC.2014.6742887

    Scopus

  • Three-terminal Ferroelectric Synapse Device with Concurrent Learning Function for Artificial Neural Networks Reviewed

    Y. Nishitani, Y. Kaneko, M. Ueda, T. Morie, E. Fujii

    Journal of Applied Physics   111   124108   2012.06

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    Language:English   Publishing type:Research paper (scientific journal)

    DOI: 10.1063/1.4729915

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  • Analog CMOS Circuit Implementation of a Pulse-coupled Phase Oscillator System and Observation of Synchronization Phenomena, Reviewed

    3 ( 2 )   180 - 190   2012.04

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  • A VLSI Spiking Neural Network with Symmetric STDP and Associative Memory Operation Reviewed

    F. Maldonado H., H. Tanaka, T. Matsuo, T. Morie, K. Aihara

    18th Int. Conf. on Neural Information Processing (ICONIP2011)   III ( 7064 )   381 - 388   2011.11

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    Chaina   Shanghai   2011.11.14  -  2011.11.17

    DOI: 10.1007/978-3-642-24965-5_43

    Scopus

  • 知的画像認識技術と脳型LSI実装 Invited Reviewed

    森江 隆, 石川 聖二

    電子情報通信学会誌   94 ( 6 )   459 - 463   2011.06

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    Authorship:Corresponding author   Language:Japanese   Publishing type:Research paper (scientific journal)

  • アナログ・デジタル融合方式LSI技術による脳型視覚システム Invited Reviewed

    森江隆

    IEICE Fundamentals Review   1 ( 1 )   19 - 29   2007.07

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    主要雑誌 代表的研究業績

  • Random Network Structure of Materials Developing Next Generation AI Devices for Autonomous Robotics Invited International journal

    H. Tanaka, H. Tamukoh, T. Morie

    239th ECS Meeting with the 18th International Meeting on Chemical Sensors (IMCS)   2021.06

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  • Initial states and analog switching behaviors of two major tantalum oxide resistive memories Reviewed International journal

    Li Y., Tsurumaki-Fukuchi A., Arita M., Morie T., Takahashi Y.

    Japanese Journal of Applied Physics   59 ( 4 )   2020.04

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    Language:English   Publishing type:Research paper (scientific journal)

    DOI: 10.35848/1347-4065/ab8022

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  • Reconstructing bifurcation diagrams only from time-series data generated by electronic circuits in discrete-time dynamical systems Reviewed

    Itoh Y., Uenohara S., Adachi M., Morie T., Aihara K.

    Chaos   30 ( 1 )   2020.01

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    Language:English   Publishing type:Research paper (scientific journal)

    DOI: 10.1063/1.5119187

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  • FPGA Implementation of Reservoir Computing Based on Pseudo-Billiard Dynamics in Hypercube

    YAMAMOTO Daichi, KATORI Yuichi, TAMUKOH Hakaru, MORIE Takashi, KATORI Yuichi

    Proceedings of the Annual Conference of JSAI ( The Japanese Society for Artificial Intelligence )   2020 ( 0 )   3Rin422 - 3Rin422   2020.01

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    Language:Japanese   Publishing type:Research paper (other academic)

    <p>Reservoir computing (RC) is one of the frameworks of the recurrent neural network (RNN) and is applied to processing of time series data. The implementation of machine learning and neural networks generally demands large computational resources (or circuit resource) and power. Katori et al. proposed a reservoir computing model based on pseudo-billiard dynamics on a hypercube. This hypercube-based reservoir computing (HRC) can be implemented with less circuit resource and with low power consumption. In this study, we improve the HRC model based on the hardware-oriented algorithm that reduces the circuit resource consumption in digital circuit implementation with Field Programmable Gate Array (FPGA). We evaluate the proposed model with time series generation tasks and confirm that the accuracy of the time-series generation is comparable with the previously proposed model. This research may enhance the ability of RC and contribute to establish a new platform for artificial intelligence.</p>

    DOI: 10.11517/pjsai.JSAI2020.0_3Rin422

    CiNii Article

    Other Link: https://ci.nii.ac.jp/naid/130007857093

  • A hardware intelligent processing accelerator for domestic service robots Reviewed

    Y. Ishida, T. Morie, H. Tamukoh

    Advanced Robotics   2020.01

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  • Hippocampus Model for Episodic Memory Processing Using Associative Memory Reviewed

    立野 勝巳, 森江 隆

    The proceedings of NOLTA2020   -   138   2020.01

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    CiNii Research

  • Prediction of Sensory Information and Generation of Motor Commands for Autonomous Mobile Robots Using Reservoir Computing Reviewed International journal

    M. Inada, Y. Tanaka, H. Tamukoh, K. Tateno, T. Morie, Y. Katori

    Proc. of the 2019 Int. Symp. on Nonlinear Theory and its Applications (NOLTA2015)   2019.12

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  • 脳型人工知能技術の開発 Invited

    2019.11

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  • Switching current of Ta<inf>2</inf>O<inf>5</inf>-based resistive analog memories Reviewed

    Li Y., Tsurumaki-Fukuchi A., Arita M., Morie T., Takahashi Y.

    2019 Silicon Nanoelectronics Workshop, SNW 2019   2019.06

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    Language:English   Publishing type:Research paper (international conference proceedings)

    DOI: 10.23919/SNW.2019.8782931

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  • Research and Development of Home Service Robots Aiming for Social Implementation

    ONO Tomohiro, SAKATA Takuma, YOSHII Takumi, KAMIMURA Daichi, KANAMARU Kazuki, NAKAMURA Kentaro, NISHIMURA Yuta, MORIE Takashi, TAMUKOH Hakaru, HORI Sansei, ISHIDA Yutaro, TANAKA Yuichiro, YOSHIMOTO Yuma, ABE Yushi, MUTO Fuyuki, KABASHIMA Kohei, FUKUYADO Masashi

    The Proceedings of JSME annual Conference on Robotics and Mechatronics (Robomec) ( The Japan Society of Mechanical Engineers )   2019 ( 0 )   1P2 - I02   2019.01

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    Language:Japanese   Publishing type:Research paper (other academic)

    <p>Home service robots have begun attracting attention due to decreasing birthrate and increasing aging population. We,"Hibikino-Musashi@Home"team, develop home service robots, and participate international competitions; RoboCup@Home and World Robot Challenge (WRC), which are established to realize that robots will work and live with people in domestic environments. In this paper, we introduce our robots and technologies, especially an object recognition and manipulation system. We use You Only Look Once (YOLO) for object recognition. To train YOLO, a big dataset which is difficult to prepare in a short term is required. For this, we develop an automatic annotation system for YOLO which can generate 1.7 million training data, and we can complete training of YOLO in a day. To grasp objects, estimation of object orientations is required. Our system can detect the orientations by processing point clouds of objects. By using the system, we obtained about 30% of scores in Tidy Up Task in the WRC.</p>

    DOI: 10.1299/jsmermd.2019.1P2-I02

    CiNii Article

    Other Link: https://ci.nii.ac.jp/naid/130007774525

  • Investigation for Multilevel Memory Capability of ReRAM using Ta2O5-δ Insulator Reviewed

    Y. Li, R. Katsumura, M. K. Gronroos, A. Tsurumaki-Fukuchi, M. Arita, H. Andoh, T. Morie, Y. Takahashi

    IEEE Silicon Nanoelectronics Workshop (SNW)   78 - 79   2018.06

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  • Live Demonstration: A Hardware Accelerated Robot Middleware Package for Intelligent Processing on Robots Reviewed

    Ishida Y., Morie T., Tamukoh H.

    Proceedings - IEEE International Symposium on Circuits and Systems   2018.05

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    DOI: 10.1109/ISCAS.2018.8351837

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  • A Hardware Accelerated Robot Middleware Package for Intelligent Processing on Robots Reviewed

    Ishida Y., Morie T., Tamukoh H.

    Proceedings - IEEE International Symposium on Circuits and Systems   2018-May   2018.04

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    DOI: 10.1109/ISCAS.2018.8351722

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  • A pulse-width-modulation mode CMOS integrated circuit implementation of threshold-coupled map Reviewed

    Uenohara Seiji, Morie Takashi, Tamukoh Hakaru, Aihara Kazuyuki

    Nonlinear Theory and Its Applications, IEICE   9 ( 2 )   268 - 280   2018.04

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    DOI: 10.1587/nolta.9.268

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  • A shared synapse architecture for efficient FPGA implementation of autoencoders Reviewed

    13 ( 3 )   e0194049   2018.03

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    DOI: 10.1371/journal.pone.0194049

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  • Brain-like analog computing and its dedicated integrated circuit Invited Reviewed

    Takashi Morie

    Artificial Intelligence   33 ( 1 )   39 - 44   2018.01

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  • A hardware-oriented dropout algorithm for efficient FPGA implementation Reviewed

    10639 LNCS   821 - 829   2017.11

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    China   Guangzhou   2017.11.14  -  2017.11.18

    DOI: 10.1007/978-3-319-70136-3_87

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  • An implementation of a spiking neural network using digital spiking silicon neuron model on a SIMD processor Reviewed

    10613 LNCS   437 - 438   2017.09

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    Italy   Alghero   2017.09.11  -  2017.09.14

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  • Fostering Professional Personnel for Intelligent Car and Robotics in Car-Robo Joint Graduate School Invited Reviewed

    J. of JSEE   65 ( 4 )   51 - 56   2017.07

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  • Evaluation of multilevel memory capability of ReRAM using Ta<inf>2</inf>O<inf>5</inf>insulator and different electrode materials Reviewed

    85 - 86   2017.06

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    Japan   Kyoto   2017.06.04  -  2017.06.05

    DOI: 10.23919/SNW.2017.8242309

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  • Synchronization of Pulse-Coupled Phase Oscillators over Multi-FPGA Communication Links Reviewed

    D. Pramanta, T. Morie, H. Tamukoh

    Journal of Robotics, Networking and Artificial Life   4 ( 1 )   91 - 96   2017.06

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  • Self-Feedback Electrically Coupled Spin-Hall Oscillator Array for Pattern-Matching Operation Reviewed

    K. Kudo, T. Morie

    Appl. Phys. Express   10 ( 4 )   043001   2017.03

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    DOI: 10.7567/APEX.10.043001

  • Multi-Valued Quantization Neural Networks toward Hardware Implementation Reviewed

    Y. Aratani, Y. Y. Jye, A. Suzuki, D. Shuto, T. Morie, H. Tamukoh

    Proc. of the 2017 International Conference On Artificial Life And Robotics (ICAROB2017)   58 - 58   2017.01

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    Japan   Miyazaki   2017.01.19  -  2017.01.22

  • Implementation of multi-FPGA Communication using Pulse-Coupled Phase Oscillators Reviewed

    D. Pramanta, T. Morie, H. Tamukoh

    Proc. of the 2017 International Conference On Artificial Life And Robotics (ICAROB2017)   57 - 57   2017.01

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    Japan   Miyazaki   2017.01.19  -  2017.01.22

  • An Electrically Coupled Spin-Hall Oscillator Array for Pattern Matching Operation Reviewed

    K. Kudo, T. Morie

    61st Annual Conf. on Magnetism and Magnetic Materials (MMM 2016)   2016.11

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  • A CMOS Unit Circuit Using Subthreshold Operation of MOSFETs for Chaotic Boltzmann Machines Reviewed

    M. Yamaguchi, T. Kato, Q. Wang, H. Suzuki, H. Tamukoh, T. Morie

    Proc. 23rd Int. Conf. on Neural Information Processing (ICONIP2016)   9947   248 - 255   2016.10

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  • Time-domain Weighted-sum Calculation for Ultimately Low Power VLSI Neural Networks Reviewed

    Q. Wang, H. Tamukoh, T. Morie

    Proc. 23rd Int. Conf. on Neural Information Processing (ICONIP2016)   9947   240 - 247   2016.10

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  • FPGA Implementation of Autoencoders Having Shared Synapse Architecture Reviewed

    A. Suzuki, T. Morie, H. Tamukoh

    Proc. 23rd Int. Conf. on Neural Information Processing (ICONIP2016)   9947   231 - 239   2016.10

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  • Analog VLSI Circuits and Devices for Neuro-Inspired Time-Domain Computing Invited Reviewed

    T. Morie

    Ext. Abstracts of Int. Conf. on Solid State Devices and Materials (SSDM 2016)   117 - 118   2016.09

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  • Hardware-oriented Algorithm for Chaotic Boltzmann Machines Reviewed

    I. Kawashima, S. Uenohara, T. Kato, M. Yamaguchi, H. Suzuki, T. Morie, H. Tamukoh

    Int. Workshop on Smart Info-Media Systems in Asia (SISA)   2016.09

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  • Restricted Boltzmann Machines without Random Number Generators for Efficient Digital Hardware Implementation Reviewed

    S. Hori, T. Morie, H. Tamukoh

    The 25th Int. Conf. on Artificial Neural Networks (ICANN)   9886   391 - 398   2016.09

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  • Depth-Based Visual Servoing Using Low-Accurate Arm Reviewed

    L. Hofer, M. Tanaka, H. Tamukoh, A. A. F. Nassiraei, T. Morie

    Joint 8th Int. Conf. on Soft Computing and Intelligent Systems and 17th Int. Symp. on Advanced Intelligent Systems (SCIS & ISIS 2016)   2016.08

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  • Analog Memory Characteristics of 1T1R MoOx Resistive Random Access Memory Reviewed

    M. Jo, R. Katsumura, A. Tsurumaki-Fukuchi, M. Arita, Y. Takahashi, H. Ando, and T. Morie

    IEEE Silicon Nanoelectronics Workshop (SNW)   78 - 79   2016.06

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    USA   Honolulu   2016.06.12  -  2016.06.13

  • Human Detection and Face Recognition Using 3D Structure of Head and Face Surfaces Detected by RGB-D Sensor Reviewed

    M. Tanaka, H. Matsubara, T. Morie

    Journal of Robotics and Mechatronics   27 ( 6 )   691 - 697   2015.12

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  • A Pixel-Parallel State-Propagation Algorithm with Self-Update of Propagation Direction for Subjective Contour Generation Reviewed

    H. Sou, T. Morie

    Int. Sympo. on Intelligent Signal Processing and Communication Systems (ISPACS 2015)   53 - 56   2015.11

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    Indonesia   Bali   2015.11.09  -  2015.11.12

    DOI: 10.1109/ISPACS.2015.7432736

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  • CMOS Circuits and Nanodevices for Spike Based Neural Computing Invited Reviewed

    T. Morie

    IEEE Int. Meeting for Future of Electron Devices, Kansai   112 - 113   2015.06

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    Japan   Kyoto   2015.06.04  -  2015.06.05

    DOI: 10.1109/IMFEDK.2015.7158575

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  • More than Mooreでブレークスルーを狙う脳型チップ

    森江 隆

    日本神経回路学会誌 ( Japanese Neural Network Society )   22 ( 2 )   51 - 52   2015.01

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    DOI: 10.3902/jnns.22.51

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  • Morphological Associative Memory Employing a Split Store Method Reviewed

    H. Tamukoh, K. Koga, H. Harada, T. Morie

    Proc. 21th Int. Conf. on Neural Information Processing (ICONIP2014), (Lecture Notes in Computer Science, LNCS 8836)   3   341 - 348   2014.10

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    Malaysia   Kuala Lumpur and Kuching   2014.10.31  -  2014.11.06

  • A Chaotic Spiking Oscillator That Acts As a Filter of Spike Trains Reviewed

    S. Uenohara, T. Morie

    Abs. Collection of the 2014 Int. Symp. on Nonlinear Theory and its Applications (NOLTA2014)   723 - 726   2014.09

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    Switzerland   Luzern   2014.09.14  -  2014.09.18

  • A Motion Detection Model Inspired by Hippocampal Function and Its Applications to Obstacle Detection Reviewed

    H. Liang, T. Morie

    Neurocomputing   129   59 - 66   2014.04

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    DOI: 10.1016/j.neucom.2012.08.072

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  • M-HOG 特徴量と色相の共起情報を用いた人検出法 Reviewed

    中島 佑樹, タン ジュークイ, 金 亨燮, 森江 隆, 石川 聖二

    バイオメディカル・ファジィ・システム学会誌   16 ( 1 )   67 - 74   2014.04

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  • Digital Circuit Design of Pulse-coupled Phase Oscillator Systems for Coupled MRF Models Reviewed

    Y. Suedomi, H. Tamukoh, M. Tanaka, K. Matsuzaka, T. Morie

    2014 RISP Int. Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2014)   89 - 92   2014.03

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    USA   Honolulu, Hawaii   2014.03.01  -  2014.03.03

  • Object Segmentation Using 3D Information Obtained from RGB-D Sensor Reviewed

    T. Matsumoto, M. Tanaka, H. Tamukoh, T. Morie

    2014 RISP Int. Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2014)   377 - 380   2014.03

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    USA   Honolulu, Hawaii   2014.03.01  -  2014.03.03

  • Sound Quality Improvement of Low Bit Rate Coded Audio Signals with Nonlinear Functions Reviewed

    T. Yoshino, Y. Sato, H. Tamukoh, T. Morie

    2014 RISP Int. Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2014)   237 - 240   2014.03

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    USA   Honolulu, Hawaii   2014.03.01  -  2014.03.03

  • Robustness to CMOS Device Mismatches of Time-domain Voltage/Current Sampling Circuits for Implementing Large-scale Coupled Nonlinear Dynamical Systems Reviewed

    S. Uenohara, D. Atuti, K. Matsuzaka, H. Tamukoh, T. Morie

    2014 RISP Int. Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2014)   93 - 96   2014.03

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    USA   Honolulu, Hawaii   2014.03.01  -  2014.03.03

  • Videotaped obstacle extraction from a moving camera Reviewed

    10 ( 2 )   717 - 728   2014.02

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  • Classifying 2D and 3D objects on a road employing the road plane Reviewed

    1689 - 1692   2013.12

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  • Parameterized Digital Hardware Design of Pulse-coupled Phase Oscillator Model toward Spike-based Computing Invited Reviewed

    Y. Suedomi, H. Tamukoh, M. Tanaka, K. Matsuzaka, T. Morie

    Proc. 20th Int. Conf. on Neural Information Processing (ICONIP2013)   2013.11

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    Korea   Daegu   2013.11.03  -  2013.11.07

    DOI: 10.1007/978-3-642-42051-1_3

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  • A PWM-Mode CMOS Threshold-Coupled-Map Circuit Robust to Device Mismatches Reviewed

    S. Uenohara, D. Atuti, K. Matsuzaka, H. Tamukoh, T. Morie, K. Aihara

    Abs. Collection of the 2013 Int. Symp. on Nonlinear Theory and Its Applications (NOLTA2013)   503 - 506   2013.09

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    USA   Santa Fe   2013.09.08  -  2013.09.11

  • Road region estimation and obstacles extraction using a monocular camera Reviewed

    9 ( 9 )   3561 - 3572   2013.07

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  • Experimental Distinction between Chaotic and Strange Nonchaotic Attractors on the Basis of Consistency Reviewed

    Uenohara, T. Mitsui, Y. Hirata, T. Morie, Y. Horio, K. Aihara

    Chaos   23 ( 2 )   23110-1 - 23110-9   2013.05

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    DOI: 10.1063/1.4804181

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  • Obstacles extraction using a moving camera Reviewed

    7729 LNCS ( PART 2 )   441 - 453   2013.04

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    DOI: 10.1007/978-3-642-37484-5_36

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  • Gabor Features for Real-Time Road Environment Classification Reviewed

    L. Mioulet, T. P. Breckon, A. Mouton, H. Liang, T. Morie

    Proc. IEEE Int. Conf. on Industrial Technology (ICIT)   1117 - 1121   2013.02

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    South Africa   Cape Town   2013.02.25  -  2013.02.27

    DOI: 10.1109/ICIT.2013.6505829

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  • スパイクベース非線形演算のためのCMOS結合位相振動子回路

    東原 敬, 松坂 建治, 西 広海, 森江, 隆

    電子情報通信学会 NLP研究会   112 ( 389 )   137 - 142   2013.01

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  • FPGAにより制御される専用アナログチップを用いたスパイキングニューラルネットワークシステムの開発

    前田 道孝, Frank Maldonado H., 松尾 貴之, 田中 秀樹, 梁 海超, 松坂 建治, 森江 隆, 合原 一幸

    電子情報通信学会 NC研究会   112 ( 390 )   181 - 186   2013.01

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  • 電圧・電流波形サンプリング方式によるしきい値結合カオス回路の設計

    上ノ原 誠二, 厚地 泰輔, 松坂 建治, 森江 隆, 合原 一幸

    電子情報通信学会 NLP研究会   112 ( 389 )   105 - 110   2013.01

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  • Obstacles Extraction from a Video Taken by a Moving Camera Reviewed

    2012.12

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    DOI: 10.1109/ICCVE.2012.59

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  • 知的センシグデバイスデバイスのための脳型処理モデルを実現するアナログ・ディジタル融合LSI Invited

    森江 隆, 秦 佑輔 、西 広海 、松坂 建治

    電気学会 センサ・マイクロマシン部門大会, 第29回「センサ・マイクロマシンと応用システム」シンポジウム   2012.10

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  • LSI実装に向けたパルス結合位相振動子系に基づくスパイクベース演算

    松坂 建治, 田中 秀樹, 大久保 悟, 東原 敬, 森江 隆

    電子情報通信学会 NC研究会   112 ( 227 )   127 - 132   2012.10

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  • トマト果実自動収穫のためのKinectセンサを利用した果実・萼位置検出手法

    栗谷 康隆, 田中 宙夫, 松原 弘樹, 清水 昌樹, 森江 隆

    画像の認識・理解シンポジウム   IS1-76   2012.08

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  • A Hierarchical Extension of the HOG Model Implemented in the Convolution-net for Human Detection Reviewed

    5 ( 3 )   54 - 62   2012.08

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    DOI: 10.2197/ipsjtrans.5.177

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  • Biologically-inspired Learning Device using Three-terminal Ferroelectric Memristor Reviewed

    275 - 276   2012.06

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    DOI: 10.1109/DRC.2012.6256971

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  • Bicycle Detection Using Pedaling Movement by Spatiotemporal Gabor Filtering Reviewed

    K. Takahashi, Y. Kuriya, T. Morie

    Int. J. of innovative Computing Information and Control   8 ( 6 )   2012.06

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  • Torus-doubling Process via Strange Nonchaotic Attractors Reviewed

    376   1907 - 1914   2012.05

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    DOI: 10.1016/j.physleta.2012.04.005

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  • 画像処理による道路状態・歩行者の認識,

    森江 隆, 石川 聖二, 松岡 悟

    光技術コンタクト ( 社団法人 日本オプトメカトロニクス協会 )   50 ( 6 )   20 - 24   2012.04

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  • 強誘電体ゲートトランジスタを用いたシナプス素子におけるSTDP機能の実証

    .西谷 雄, 金子 幸広, 上田 路人, 森江 隆, 藤井 映志

    電子情報通信学会 NC研究会   111 ( 483 )   203 - 207   2012.03

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    日本   玉川大学(東京)   2012.03.01

  • A hierarchical extension of the HOG model implemented in the convolution-net for human detection

    2012.02

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  • A Motion Detection Model Inspired by the Neuronal Propagation in the Hippocampus Reviewed

    H. Liang, T. Morie

    E95-A ( 2 )   576 - 585   2012.02

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    DOI: 10.1587/transfun.E95.A.576

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  • Applying HOG feature to the detection and tracking of a human on a bicycle Reviewed

    1740 - 1743   2011.12

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  • Obstacle detection using a moving camera Reviewed

    767 - 770   2011.12

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  • Moving objects detection at an intersection by sequential background extraction Reviewed

    1752 - 1755   2011.12

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  • Extraction of individual pedestrians employing stereo camera images Reviewed

    1744 - 1747   2011.12

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  • A 1-D CMOS Pixel Circuit Array Implementing a Region-Based Coupled MRF Model for Coarse Image Region Segmentation Reviewed

    210 - 211   2011.12

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    Japan   Okinawa   2011.12.05  -  2011.12.17

  • Analysis of Associative Memory Operation in a VLSI Spiking Neural Network Reviewed

    208 - 209   2011.12

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    Japan   Okinawa   2011.12.05  -  2011.12.17

  • Fundamental Study on Spiking Neuron Devices Reviewed

    120 - 121   2011.11

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    Japan   Sendai   2011.11.09  -  2011.11.11

  • A Motion Detection Model Inspired by Hippocampal Function and Its FPGA Implementation Reviewed

    H. Liang T. Morie

    18th Int. Conf. on Neural Information Processing (ICONIP2011)   III ( 7064 )   522 - 529   2011.11

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    China   Shanghai   2011.11.14  -  2011.11.17

    DOI: 10.1007/978-3-642-24965-5_59

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  • ナノディスクアレイ構造とCMOS回路を結合したスパイキングニューロンデバイス

    梁 海超, 森江 隆, 孫 意来, 五十嵐 誠, 寒川 誠二

    電子情報通信学会 ニューロコンピューティング研究会   111 ( 241 )   125 - 129   2011.10

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    日本   九州大学(福岡)  

  • Detecting a Human Body Direction Using Multiple-HOG Reviewed

    First Int. Symp. on Future Active Safety Technology toward zero-traffic-accident (FAST-zero '11)   20117394-1 - 20117394-6   2011.09

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    日本   Tokyo   2011.09.05  -  2011.09.09

  • Detection of Road Surface Condition Using Gabor Filter Reviewed

    First Int. Symp. on Future Active Safety Technology toward zero-traffic-accident (FAST-zero '11)   20117341-1 - 20117341-5   2011.09

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    日本   Tokyo   2011.09.05  -  2011.09.09

  • 脳型情報処理デバイスの現状と今後の展開 Invited

    森江 隆, 梁 海超, 孫 意来, 田中 秀樹, 五十嵐 誠, 寒川 誠二

    応用物理学会シリコンテクノロジー分科会第140回研究集会   28 - 32   2011.08

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    日本   東北大学 (仙台)  

  • A CMOS Nonlinear-Map Circuit Array for Threshold-Coupled Chaotic Maps Using Pulse-Modulation Approach Reviewed

    European Conf. on Circuit Theory and Design (ECCTD 2011)   125 - 128   2011.08

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    Sweden   Linköping   2011.08.29  -  2011.08.31

    DOI: 10.1109/ECCTD.2011.6043293

    Scopus

  • Analog CMOS Circuit Implementation of a System of Pulse-Coupled Oscillators for Spike-Based Computation Reviewed

    IEEE Int. Symp. on Circuits and Systems (ISCAS 2011)   2849 - 2852   2011.05

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    Brazil   Rio de Janeiro   2011.05.15  -  2011.05.18

    DOI: 10.1109/ISCAS.2011.5938199

    Scopus

  • 画素並列ハードウェアのための曲率を有する主観的輪郭生成アルゴリズム

    山口 雄一郎,森江 隆

    電子情報通信学会 NC研究会   110 ( 461 )   65 - 70   2011.03

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    研究会報告

  • 大局的画像領域分割のための領域および境界ベース結合MRFモデルを実現するPWM方式画素並列型LSIの設計

    秦 佑輔,松坂 建治,西 広海,中田 一紀,森江 隆

    電子情報通信学会 NC研究会   110 ( 461 )   59 - 64   2011.03

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    研究会報告

  • 集積回路化を目指した大局的画像領域分割のための領域ベース結合MRFモデル Reviewed

    梁 海超, 川嶋佑輔, 松坂 建治, 中田 一紀, 岡田 真人, 森江 隆

    電気学会論文誌C   131 ( 3 )   567 - 575   2011.03

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  • 海馬の神経活動にヒントを得た単眼カメラ映像での動き検出モデルおよびその障害物検知への応用

    梁 海超,森江 隆

    電子情報通信学会 ITS研究会, Vol. 110, No. 420, ITS2010-62, pp. 269-274, 2011年2月22日, 北海道大学(札幌)   110 ( 420 )   269 - 274   2011.02

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    研究会報告

  • 車載カメラ画像のガボールフィルタ処理による自動車前方路面の乾湿判定

    田中 宙夫,森江 隆,松岡 悟,岩瀬 耕二,山本 康典

    電子情報通信学会 ITS研究会   110 ( 420 )   263 - 267   2011.02

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    日本   北海道大学(札幌)  

    研究会報告

  • 時空間ガボールフィルタによるペダル漕ぎ運動検出を用いた自転車識別

    高橋 和志,栗谷 康隆,森江 隆

    電子情報通信学会 ITS研究会   110 ( 420 )   257 - 262   2011.02

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    日本   北海道大学(札幌)  

    研究会報告

  • Parametric Control in a Region-based Coupled MRF model with Phase Dynamics for Coarse Image Region Segmentation Reviewed

    H. Liang,K. Nakada,K. Matsuzaka,T. Morie,M. Okada

    The 13th IEEE International Conference on Computational Science and Engineering (CSE 2010)   190 - 195   2010.12

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    China   Hong Kong   2010.12.11  -  2010.12.13

    DOI: 10.1109/CSE.2010.32

    Scopus

  • Bicycle Detection Using Pedaling Movement by Spatiotemporal Gabor Filtering Reviewed

    K. Takahashi,Y. Kuriya,T. Morie

    Int. Tech. Conf. of IEEE Region 10 (TENCON2010)   918 - 922   2010.11

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    Fukuoka   2010.11.21  -  2010.11.24

    DOI: 10.1109/TENCON.2010.5686551

    Scopus

  • Detecting a Human Body Direction Using a Feature Selection Method Reviewed

    Y. Nakashima,J. K. Tan,S. Ishikawa,T. Morie

    Proc. of Int. Conf. on Control, Automation and Systems   1424 - 1427   2010.10

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    Korea   2010.10.27  -  2010.10.30

  • 集積回路実装に向けた大局的画像領域分割のための領域ベース結合MRFモデルのパラメータ制御

    梁 海超,松坂 建治,中田 一紀,岡田 真人,森江 隆

    電子情報通信学会 ニューロコンピューティング研究会   110 ( 264 )   35 - 40   2010.10

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  • Control of Activation Energy for Electron Transport in Two-Dimensional Array of Si Nanodisks Reviewed

    M. Igarashi,C. H. Huang,T. Morie,S. Samukawa

    Ext. Abstracts of Int. Conf. on Solid State Devices and Materials (SSDM)   934 - 935   2010.09

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    Tokyo   2010.09.22  -  2010.09.24

  • Coarse Image Edge Detection Using Self-Adjusting Resistive-Fuse Networks Reviewed

    H. Liang,T. Morie

    Proc. of 10th Int. Workshop on Pattern Recognition in Information Systems (PRIS 2010)   43 - 52   2010.06

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    Portugal   2010.06.08  -  2010.06.09

  • A 2-Dimensional Si Nanodisk Array Structure for Spiking Neuron Models Reviewed

    T. Morie,Y. Sun,H. Liang,M. Igarashi,C. Huang,S. Samukawa

    IEEE Int. Symp. on Circuits and Systems (ISCAS 2010)   781 - 784   2010.06

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    France   2010.05.30  -  2010.06.02

    DOI: 10.1109/ISCAS.2010.5537456

    Scopus

  • Coarse Image Region Segmentation Performance of a Region-based Coupled MRF Model with Improved Evaluation Function Reviewed

    K. Nakada,K. Matsuzaka,T. Morie

    Fourteenth International Conference on Cognitive and Neural Systems (ICCNS), p. 31, Boston, USA, May 19-22 (May 20), 2010.   31 - 31   2010.05

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    USA   2010.05.19  -  2010.05.22

  • 車載カメラ映像からの横断歩道上の歩行者の検出法 Reviewed

    タン ジュークイ,三好 誠,石川 聖二,森江 隆

    バイオメディカル・ファジィ・システム学会誌   12 ( 1 )   99 - 103   2010.05

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  • Automatic Detection of Pedestrians from Stereo Camera Images Reviewed

    J. K. Tan,K. Inumaru,S. Ishikawa,T. Morie

    Artificial Life and Robotics   15 ( 4 )   459 - 463   2010.04

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    DOI: 10.1007/s10015-010-0843-2

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  • On Detecting a Human and Its Body Direction from a Video Reviewed

    Y. Nakashima,J. K. Tan,S. Ishikawa,T. Morie

    Artificial Life and Robotics   15 ( 4 )   455 - 458   2010.04

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    DOI: 10.1007/s10015-010-0841-4

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  • HOG特徴量と人マスクを用いた人物および身体方向の検出 Reviewed

    中島 佑樹,タン ジュークイ,石川 聖二,森江 隆

    画像電子学会誌   39 ( 6 )   1104 - 1111   2010.04

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  • Markerless Arm Posture Estimation Independent of Environment Reviewed

    M. Shimizu,I. R. Khan,Y. Kuriya,H. Miyamoto,T. Morie

    J. Signal Processing   14 ( 6 )   475 - 481   2010.04

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  • Coarse Image Region Segmentation in Spatio-Temporal Domain Using a Region-based Coupled MRF Model with Phase Dynamics Reviewed

    K. Nakada,K. Matsuzaka,T. Morie

    Australian Journal of Intelligent Information Processing Systems   11 ( 2 )   6 - 11   2010.04

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  • Control of Electron Transport in Two-Dimensional Array of Si Nanodisks for Spiking Neuron Device Reviewed

    M. Igarashi,C.-H. Huang,T. Morie,S. Samukawa

    Appl. Phys. Express   3   085202 - 085202   2010.04

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    DOI: 10.1143/APEX.3.085202

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    CiNii Article

  • Markerless Arm Posture Estimation Independent of Environment Reviewed

    M. Shimizu,I. R. Khan,Y. Kuriya,H. Miyamoto,T. Morie

    RISP 2010 Int. Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP'10)   2010.03

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    USA   Hawaii   2010.03.03  -  2010.03.05

  • On Detecting a Human and Its Body Direction from a Video Reviewed

    Y. Nakashima,J. K. Tan,S. Ishikawa,T. Morie

    Int. Symp. on Artificial Life and Robotics (AROB 15th '10)   #GS2-5   294 - 297   2010.02

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    Beppu   2010.02.02  -  2010.02.04

  • Automatic Detection of Pedestrians from Stereo Camera Images Reviewed

    K. Inumaru,J. K. Tan,S. Ishikawa,T. Morie

    Int. Symp. on Artificial Life and Robotics (AROB 15th '10)   #GS9-4   1018 - 1021   2010.02

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    Beppu   2010.02.02  -  2010.02.04

  • しきい値処理により結合されたカオス力学系のパルス変調方式CMOS回路実現,

    井福一毅,厚地泰輔,森江隆,堀尾喜彦,合原一幸

    電子情報通信学会 非線形問題研究会, NLP2009-154   109 ( 366 )   65 - 70   2010.01

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  • 画素並列型異方性拡散LSIとそれを用いてエッジ補完を行う画像処理システム,

    財津賢一郎,金 永宰,栗谷康隆,森江 隆

    映像情報メディア学会技術報告 情報センシング研究会   33 ( 56 )   17 - 20   2009.12

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  • A Simplified Region-Based Coupled MRF Model for Coarse Image Region Segmentation Toward its VLSI Implementation, Reviewed

    K. Matsuzaka,T. Morie

    Proc. of Int. Symp. on Nonlinear Theory and its Applications (NOLTA2009)   202 - 205   2009.10

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    Sapporo   2009.10.19  -  2009.10.19

  • Video Monitoring of Slope Failure Using Spatiotemporal Gabor Filtering Reviewed

    K. Okamoto,T. Watanabe,H. Ban,Y. Maeda,A. Hanazawa,T. Morie

    Proc. of the 2009 IEEE Int. Conf. on Systems, Man, and Cybernetics (SMC2009)   986 - 991   2009.10

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    USA   San Antonio   2009.10.12  -  2009.10.12

  • New Functional Device Characteristics with 2-Dimensional Array of Si Nanodisks Fabricated by Combination of Bio-Template and Ultimate Top-down Etching Reviewed

    M. Igarashi,C. H. Huang,M. Tomura,M. Takeguchi,S. Horita,Y. Uraoka,T. Fuyuki,I. Yamashita,T. Morie,S. Samukawa

    Ext. Abstracts of Int. Conf. on Solid State Devices and Materials (SSDM)   1364 - 1365   2009.08

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    Sendai   2009.08.07  -  2009.08.09

  • A CMOS Spiking Neural Network Circuit with Symmetric/Asymmetric STDP Function, Reviewed

    H. Tanaka,T. Morie,K. Aihara

    IEICE Trans. Fundamentals   E92-A ( 7 )   2009.07

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  • Coarse Image Region Segmentation Using Region- and Boundary-based Coupled MRF Models and Their PWM VLSI Implementation Reviewed

    Y. Kawashima,D. Atuti,K. Nakada,M. Okada,T. Morie

    Proc. Int. Joint Conf. on Neural Networks (IJCNN 2009)   1559 - 1565   2009.06

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    USA   Atlanta   2009.06.14  -  2009.06.19

  • A Current-Sampling-Mode CMOS Arbitrary Chaos Generator Circuit Using Pulse Modulation Approach, Reviewed

    D. Atuti,T. Morie,K. Aihara

    IEICE Trans. Fundamentals   E92-A ( 5 )   1308 - 1315   2009.05

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  • パルス変調方式を用いた電流サンプリング型CMOS任意カオス生成回路,

    厚地泰輔,森江隆,合原一幸

    電気学会電子回路研究会, ECT-09-19,   25 - 30   2009.01

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  • 時空間ガボールフィルタによる土砂災害前兆現象検知

    岡本健,渡辺敏雄,花沢明俊,森江隆,伴弘司,前田裕二

    電子情報通信学会 パターン認識・メディア理解研究会, PRMU2008-131   108 ( 327 )   139 - 144   2008.11

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  • A Prototype System for Secure Human-Machine Interaction Based on Face and Gesture Recognition, Reviewed

    I..R. Khan,T. Morie,H. Miyamoto,M. Shimizu,and Y. Kuriya

    The 34th Annual Conf. of the IEEE Industrial Electronics Society (IECON'08),   1572 - 1577   2008.11

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    USA   Orlando   2008.11.10  -  2008.11.13

  • 時間領域情報処理による脳型集積システム

    森江隆,田中 秀樹,厚地 泰輔,是角 圭祐,中田 一紀

    電子情報通信学会 ニューロコンピューティング研究会, NC2008-68   108 ( 281 )   55 - 60   2008.11

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  • MOSFETのしきい値電圧の温度依存性を利用した温度補償電流源回路とその応用,

    中島規成,森江隆

    電気学会C部門 電子回路研究会, ECT-08-64   1 - 5   2008.10

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  • Face and Arm-Posture Recognition for Secure Human-Machine Interaction Reviewed

    I. R. Khan,T. Morie,H. Miyamoto

    IEEE Int. Conf. on Systems, Man and Cybernetics (SMC2008)   411 - 417   2008.10

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    Singapore   Singapore   2008.10.12  -  2008.10.15

  • CMOS Pulse-Modulation Circuit Implementation of Phase-Locked Loop Neural Networks, Reviewed

    D. Atuti,K. Nakada,T. Morie

    IEEE Int. Symp. on Circuits and Systems (ISCAS2008)   2174 - 2177   2008.05

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    USA   Seattle   2008.05.20  -  2008.05.20

  • 領域ベース結合MRFモデルによる大局的画像領域分割とCMOS回路実現

    川嶋佑輔,厚地泰輔,中田一紀,岡田真人,森江隆

    電子情報通信学会 ニューロコンピューティング研究会, NC2007-120   107 ( 542 )   49 - 54   2008.03

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    研究会報告

  • パルス変調方式による相互結合位相振動子のCMOS 回路実現と評価

    厚地泰輔,加藤直人,中田一紀,森江 隆

    電気学会電子回路研究会   25 - 29   2007.12

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  • STDPを有するCMOSスパイキングニューラルネットワークLSIの評価

    田中秀樹,森江隆,合原一幸

    電子情報通信学会 ニューロコンピューティング研究会, NC2007-61   107 ( 328 )   37 - 42   2007.11

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  • Projection-field-type VLSI Convolutional Neural Networks Using Merged/Mixed Analog-Digital Approach Reviewed

    O. Nomura,T. Morie

    Neural Information Processing (Lecture Notes in Computer Science, Springer Berlin/Heidelberg   4984/2008   1081 - 1090   2007.11

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    Kitakyushu   2007.11.13  -  2007.11.16

  • Projection-field-type VLSI Convolutional Neural Networks Using Merged/Mixed Analog-Digital Approach Reviewed

    O. Nomura,T. Morie

    14th Int. Conf. on Neural Information Processing (ICONIP2007)   196 - 196   2007.11

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    Kitakyushu, Japan,   2007.11.15  -  2007.11.15

  • Brain-inspired Visual Processing: Real-time Face Authentication, arm Posture Recognition, and Shadow Elimination Reviewed

    T. Morie,H. Miyamoto,A. Hanazawa,I. R. Khan,T. Kamada,Y. Kuriya,and M. Shimizu

    4th Int. Conf. on Brain-Inspired Information Technology (BrainIT2007)   33 - 33   2007.11

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    Kitakyushu   2007.11.15  -  2007.11.15

  • An FPGA-based Collision Warning System Using Hybrid Approach Reviewed

    H. Liang,T. Morie,Y. Suzuki,K. Nakada,T. Miki,H. Hayashi

    7th Int. Conf. on Hybrid Intelligent Systems (HIS07)   30 - 35   2007.09

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    Kaiserslautern, Germany   2007.09.17  -  2007.09.19

  • CMOS Circuit Implementation of a Coupled Phase Oscillator System Using Pulse Modulation Approach Reviewed

    D. Atuti,N. Kato,K. Nakada,T. Morie

    2007 European Conference on Circuit Theory and Design (ECCTD 2007)   827 - 830   2007.08

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    Seville, Spain   2007.08.26  -  2007.08.30

  • A Pulse-Modulation Circuit for Nonlinear Systems with Self Regulatory Threshold Dynamics Reviewed

    D. Atuti,T. Morie,K. Aihara

    15th IEEE Int. Workshop on Nonlinear Dynamics of Electronic Systems (NDES 2007)   145 - 148   2007.07

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    Tokushima, Japan   2007.07.23  -  2007.07.26

  • Evaluation of a CMOS Spiking Neural Network Circuit with STDP Function Reviewed

    H. Tanaka,T. Morie,K. Aihara

    15th IEEE Int. Workshop on Nonlinear Dynamics of Electronic Systems (NDES 2007)   313 - 316   2007.07

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    Tokushima, Japan   2007.07.23  -  2007.07.26

  • A Cellular-Automaton-Based Anisotropic Diffusion Algorithm for Subjective Contour Generation and Its Digital VLSI Implementation Reviewed

    T. Morie,T. Yamamoto

    Accepted for presentation at 2007 Conference on Unconventional Computing (UC 2007)   2007.07

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    Bristol, UK   2007.07.12  -  2007.07.14

  • Brain-inspired Visual Processing for Robust Gesture Recognition Reviewed

    T. Morie,H. Miyamoto,A. Hanazawa

    Brain-Inspired IT III, International Congress Series   1301   31 - 34   2007.07

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  • Design of a CMOS Pixel Circuit for Coarse Region Segmentation/Extraction Based on Merged Analog/Digital Architecture Reviewed

    N. Kato,T. Morie

    J. Signal Processing   11 ( 4 )   317 - 320   2007.07

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  • Digital VLSI Architecture for Image Matching Based on 2D Cross-correlation Reviewed

    M. Mitarai,K. Korekado,T. Morie

    J. Signal Processing   11 ( 4 )   345 - 348   2007.07

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  • An Element Circuit for Nonlinear Dynamical Systems Using Phase Variables Reviewed

    D. Atuti,T. Morie,T. Nakano,K. Nakada

    Brain-Inspired IT III, International Congress Series   1301   156 - 159   2007.07

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  • A CMOS Circuit for STDP with a Symmetric Time Window Reviewed

    H. Tanaka,T. Morie,K. Aihara

    Brain-Inspired IT III, International Congress Series   1301   152 - 155   2007.07

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  • Moving Object Detection Algorithm Inspired by the Sequence Detection in the Hippocampus and its Digital LSI Implementation Reviewed

    H. Hayashi,K. Nakada,T. Morie

    Brain-Inspired IT III, International Congress Series   1301   35 - 38   2007.07

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  • Digital VLSI Implementation of a Moving Object Detection Algorithm Based on Neuronal Propagation in the Hippocampus Reviewed

    H. Liang,H. Nakayama,K. Nakada,T. Morie,H. Hayashi

    International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2006)   614 - 617   2006.12

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    2006.12.14  -  2006.12.14

  • A Current-Sampling-Mode Arbitrary Chaos Generator Circuit Using Pulse Modulation Approach Driven by Quantized Nonlinear Waveforms Reviewed

    D. Atuti,T. Morie,K. Aihara

    IEEE Asia Pacific Conf. on Circuits and Systems (APCCAS 2006)   1961 - 1965   2006.12

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    2006.12.07  -  2006.12.07

  • アナログ・デジタル融合回路方式による主観的輪郭生成のための画素並列型CMOS異方性拡散回路

    金永宰,森江隆

    電子情報通信学会 ニューロコンピューティング研究会   106 ( 341 )   31 - 36   2006.11

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  • Brain-inspired Visual Processing for Robust Gesture Recognition Reviewed

    T. Morie,H. Miyamoto,A. Hanazawa

    Abst. of The 3rd Int. Conf. on Brain-Inspired Information Technology (BrainIT2006)   31 - 31   2006.09

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    2006.09.27  -  2006.09.29

  • A CMOS Circuit for STDP with a Symmetric Time Windoww Reviewed

    H. Tanaka,T. Morie,K. Aihara

    Abst. of The 3rd Int. Conf. on Brain-Inspired Information Technology (BrainIT2006)   65 - 65   2006.09

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    2006.09.27  -  2006.09.29

  • An Element Circuit for Nonlinear Dynamical Systems Using Phase Variables Reviewed

    D. Atuti,T. Morie,T. Nakano,K. Nakada

    Abst. of The 3rd Int. Conf. on Brain-Inspired Information Technology (BrainIT2006)   66 - 66   2006.09

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    2006.09.27  -  2006.09.29

  • A Real-time Image Processing System Using a Gabor-filtering LSI Realizing Primary Visual Cortex Functions Reviewed

    S. Nagano,T. Morie,T. Nakano,K. Nakamura

    Joint 3rd Int. Conf. on Soft Computing and Intelligent Systems and 7th Int. Symp. on Advanced Intelligent Systems (SCIS & ISIS 2006)   516 - 519   2006.09

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    2006.09.20  -  2006.09.24

  • A CMOS Synapse with STDP Function and Its Application to Hopfield-type Associative Memory Reviewed

    H. Tanaka,T. Morie,K. Aihara

    Int. Symp. on Nonlinear Theory and its Applications (NOLTA2006)   495 - 498   2006.09

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    2006.09.11  -  2006.09.14

  • An FPGA-based Real-time Scene-image Recognition System Using Relationship between Coarsely Segmented Regions Reviewed

    T. Morie,T. Nakano

    Int. Symp. on Artificial Brain with Emotion and Learning (ISABEL 2006) - Bio-Inspired Models and Hardware for Brain-like Intelligent Functions -   158 - 158   2006.08

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    2006.08.25  -  2006.08.25

  • A VLSI Spiking Feedback Neural Network with Negative Thresholding and Its Application to Associative Memory Reviewed

    K. Sasaki,T. Morie,A. Iwata

    IEICE Transactions on Electronics   E89-C ( 11 )   1637 - 1644   2006.04

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  • An Image-Filtering LSI Processor Architecture for Face/Object Recognition Using a Sorted Projection-Field Model based on a Merged/Mixed Analog-Digital Architecture Reviewed

    O. Nomura,T. Morie,K. Korekado,T. Nakano,M. Matsugu,A. Iwata

    IEICE Transactions on Electronics   E89-C ( 6 )   781 - 791   2006.04

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  • A Pixel Circuit Implementing an Anisotropic Diffusion Algorithm for Subjective Contour Generation Using Merged Analog-Digital circuit Approach Reviewed

    Y. Kim,T. Morie

    J. Signal Processing   10 ( 4 )   259 - 262   2006.04

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  • An Image Recognition Algorithm Using Relationships between Segmented Coarse Regions Reviewed

    T. Nakano,T. Morie

    Brain-Inspired IT II, International Congress Series   1291   241 - 244   2006.04

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  • An Analog CMOS Circuit for Spiking Neuron Models Reviewed

    H. Tanaka,T. Morie,K. Aihara

    Brain-Inspired IT II, International Congress Series   1291   217 - 220   2006.04

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  • Subjective Contour Generation Using a Pixel-parallel Anisotropic Diffusion Algorithm Reviewed

    Y. Kim,T. Morie

    Brain-Inspired IT II, International Congress Series   1291   241 - 244   2006.04

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  • Face Position Detection by a Convolutional Neural Network Using an Image Filtering Processor VLSI Reviewed

    K. Korekado,T. Morie,O. Nomura,T. Nakano,M. Matsugu,A. Iwata

    Brain-Inspired IT II, International Congress Series   1291   253 - 256   2006.04

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  • Digital VLSI Architecture for Image Matching Based on 2D Cross-correlation Reviewed

    M. Mitarai,K. Korekado,T. Morie

    RISP 2007 International Workshop on Nonlinear Circuits and Signal Processing (NCSP'07)   277 - 280   2006.03

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    2006.03.06  -  2006.03.06

  • An FPGA-based Real-time Moving-object Detection System Based on Neuronal Propagation in the Hippocampus Reviewed

    H. Liang,T. Morie,H. Nakayama,K. Nakada,H. Hayashi

    RISP 2007 International Workshop on Nonlinear Circuits and Signal Processing (NCSP'07)   509 - 512   2006.03

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    2006.03.06  -  2006.03.06

  • Design of an 2D Image Matching Processor LSI Based on Merged Analog/Digital Architecture Reviewed

    M. Sakai,T. Morie,M. Mitarai,K. Korekado

    RISP 2007 International Workshop on Nonlinear Circuits and Signal Processing (NCSP'07)   81 - 84   2006.03

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    2006.03.06  -  2006.03.06

  • Design of a CMOS Pixel Circuit for Coarse Region Segmentation/Extraction Based on Merged Analog/Digital Architecture Reviewed

    N. Kato,T. Morie

    RISP 2007 International Workshop on Nonlinear Circuits and Signal Processing (NCSP'07)   89 - 92   2006.03

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    2006.03.06  -  2006.03.06

  • A Pixel Circuit Implementing an Anisotropic Diffusion Algorithm for Subjective Contour Generation Using Merged Analog-Digital circuit Approach Reviewed

    Y. Kim,T. Morie

    2006 RISP International Workshop on Nonlinear Circuits and Signal Processing (NCSP'06)   2006.03

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    USA   2006.03.04  -  2006.03.04

  • FPGA Implementation of Resistive-Fuse Networks for Coarse Image-Region Segmentation Reviewed

    T. Nakano,T. Morie,H. Ishizu,H. Ando,A. Iwata

    Intelligent Automation and Soft Computing   12 ( 3 )   307 - 316   2006.03

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  • 顔/物体認識のためのElastic Graph MatchingのFPGA実装とその性能評価

    中野鉄平,森江隆

    電子情報通信学会 ニューロコンピューティング研究会   25 - 30   2005.11

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  • Associative Memory Operation in a Hopfield-type Spiking Neural Network with Modulation of Resting Membrane Potential Reviewed

    H. Tanaka,T. Morie,K. Aihara

    2005 Int. Symp. on Nonlinear Theory and its Applications (NOLTA2005)   313 - 316   2005.10

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    Belgium   Bruges   2005.10.18  -  2005.10.21

  • Subjective Contour Generation Using a Pixel-parallel Anisotropic Diffusion Algorithm Reviewed

    Y. Kim,T. Morie

    Abstracts of Brain-Inspired Information Technology (BrainIT2005)   94 - 94   2005.10

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    北九州   2005.10.07  -  2005.10.09

  • An Analog CMOS Circuit for Spiking Neuron Models Reviewed

    H. Tanaka,T. Morie,K. Aihara

    Abstracts of Brain-Inspired Information Technology (BrainIT2005)   2005.10

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    北九州   2005.10.07  -  2005.10.09

  • Face Position Detection Using an Image Filtering Processor VLSI Reviewed

    K. Korekado,T. Morie,O. Nomura,T. Nakano,M. Matsugu,A. Iwata

    Abstracts of Brain-Inspired Information Technology (BrainIT2005)   86 - 86   2005.10

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    北九州   2005.10.07  -  2005.10.09

  • A Current-Sampling-Mode Arbitrary Chaos Generator Circuit Using Pulse Modulation Approach Reviewed

    D. Atuti,T. Morie,K. Aihara

    Abstracts of Brain-Inspired Information Technology (BrainIT2005)   73 - 73   2005.10

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    北九州   2005.10.07  -  2005.10.09

  • An Image Recognition Algorithm Using Coarse Region Segmentation and Relationship between the Regions Reviewed

    T. Nakano,T. Morie

    Abstracts of Brain-Inspired Information Technology (BrainIT2005)   81 - 81   2005.10

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    北九州   2005.10.07  -  2005.10.09

  • A Convolutional Neural Network VLSI Architecture Using Sorting Algorithm Reviewed

    O. Nomura,T. Morie,K. Korekado,M. Matsugu,A. Iwata

    Int. Conf. on Advances in Natural Computation (ICNC'05)   1006 - 1014   2005.08

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    China   Changsha   2005.08.27  -  2005.08.29

  • A Gabor Filtering VLSI Processor Mimicking a Primary Visual Cortex Function Reviewed

    T. Morie,K. Nakamura,K. Korekado

    Post-IJCNN2005 Workshop, Biologically-Inspired Models and Hardware for Human-like Intelligent Functions (BIMH2005)   2005.08

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    Canada   2005.08.05  -  2005.08.05

  • A Digital LSI Architecture of Elastic Graph Matching and Its FPGA Implementation Reviewed

    T. Nakano,T. Morie

    Proc. Int. Joint Conference on Neural Networks (IJCNN05)   689 - 694   2005.07

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    Canada   Montreal   2005.07.31  -  2005.07.31

  • AD融合/混載アーキテクチャによる顔・物体認識のための画像フィルタリングプロセッサ

    是角圭祐,森江隆,野村修,中野鉄平,真継優和,岩田穆

    電子情報通信学会 集積回路研究会   19 - 24   2005.07

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  • V1単純細胞の機能を模倣するガボールフィルタLSIの評価

    中村享平,是角圭祐,森江隆

    電子情報通信学会 ニューロコンピューティング研究会   17 - 22   2005.06

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  • An Image Filtering Processor for Face/Object Recognition Using Merged/Mixed Analog-Digital Architecture Reviewed

    K. Korekado,T. Morie,O. Nomura,T. Nakano,M. Matsugu,A. Iwata

    2005 Symposium on VLSI Circuits   220 - 223   2005.06

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    京都   2005.06.17  -  2005.06.17

  • A Pixel-parallel Anisotropic Diffusion Algorithm for Subjective Contour Generation Reviewed

    Y. Kim,T. Morie

    IEEE Int. Symp. on Circuits and Systems (ISCAS2005)   4237 - 4240   2005.05

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    神戸   2005.05.23  -  2005.05.26

  • A Cellular-Automaton-Type Region Extraction Algorithm and its FPGA Implementation Reviewed

    T. Nakano,T. Morie,M. Nagata,A. Iwata

    J. Robotics and Mechatronics   17 ( 4 )   378 - 386   2005.04

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  • 投射野型積和演算及び荷重基底分解アルゴリズムを用いたConvolutional Neural Network VLSI アーキテクチャ

    野村修,森江隆,是角圭祐,真継優和,岩田 穆

    電子情報通信学会 ニューロコンピューティング研究会   25 - 29   2004.11

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  • 主観的輪郭生成のための画素並列型異方性拡散アルゴリズム

    金永宰,森江隆

    映像情報メディア学会技術報告   41 - 44   2004.10

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  • A Convolutional Neural Network VLSI Architecture Using Thresholding and Weight Decomposition Reviewed

    O. Nomura,T. Morie,K. Korekado,M. Matsugu,and A. Iwata

    Int. Conf. on Knowledge-Based Intelligent Information and Engineering Systems (KES'2004)   995 - 1001   2004.09

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    ニュージーランド   ウェリントン   2004.09.22  -  2004.09.24

  • A Face/Object Recognition System Using Coarse Region Segmentation and Dynamic-Link Matching Reviewed

    T. Morie,T. Nakano

    Brain-Inspired IT I, International Congress Series   1269   177 - 180   2004.09

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  • Hardware Modeling and Design of Brain-like Information Systems Reviewed

    T. Miki,T. Morie,and T. Yamakawa

    Joint 2nd Int. Conf. on Soft Computing and Intelligent Systems and 5th Int. Symposium on Advanced Intelligent Systems (SCIS & ISIS 2004)   2004.09

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    東京   2004.09  -  2004.09

  • AD融合回路方式による画素並列型ガボールフィルタLSI

    森江隆,梅澤淳,岩田穆

    電子情報通信学会 信学技報   2004.08

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  • A Spiking Neural Network with Negative Thresholding and Its Application to Associative Memory Reviewed

    K. Sasaki,T. Morie,and A. Iwata

    2004 IEEE Int. Midwest Symposium on Circuits and Systems (MWSCAS2004)   IIー89 - IIIー92   2004.07

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    広島   2004.07.25  -  2004.07.28

  • Gabor Filtering Using Cellular Neural Networks and its Application to Face/Object Recognition Reviewed

    T. Morie,T. Nakano,J. Umezawa,and A. Iwata

    World Automation Congress   2004.07

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    スペイン   セビリヤ   2004.06.28  -  2004.07.01

  • A Pixel-Parallel Image Processor for Gabor Filtering Based on Merged Analog-Digital Architecture Reviewed

    T. Morie,J. Umezawa,and A. Iwata

    2004 Symposium on VLSI Circuits   212 - 213   2004.06

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    アメリカ   ハワイ   2004.06.18  -  2004.06.18

  • Pulse Modulation Techniques for Nonlinear Dynamical Systems and a CMOS Chaos Circuit with Arbitrary 1-D Maps Reviewed

    T. Morie,K Murakoshi,M Nagata,A. Iwata

    IEICE Trans. Electron.   E87-C ( 11 )   1856 - 1862   2004.04

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  • A VLSI Convolutional Neural Network for Image Recognition Using Merged/Mixed Analog-Digital Architecture Reviewed

    K. Korekado,T. Morie,O. Nomura,H. Ando,T. Nakano,M. Matsugu,A. Iwata

    J. Intelligent & Fuzzy Systems   15 ( 3/4 )   173 - 179   2004.04

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  • Gabor-Type Filtering Using Transient States of Cellular Neural Networks Reviewed

    T. Morie,J. Umezawa,A. Iwata

    Intelligent Automation and Soft Computing   10 ( 2 )   95 - 104   2004.04

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  • A Face/Object Recognition System Using Coarse Region Segmentation and Dynamic-Link Matching Reviewed

    T. Morie,T. Nakano

    Brain-Inspired IT I, International Congress Series   1269   177 - 180   2004.04

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  • A Face/Object Recognition System Using Coarse Region Segmentation and Dynamic-Link Matching Reviewed

    T. Morie,T. Nakano

    International Symposium on Bio-Inspired Systems, Part IV, Brain-inspired Information Technology (BrainIT 2004)   2004.03

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    北九州   2004.03.08  -  2004.03.08

  • 減衰シナプスを導入したスパイキングニューロンによるホップフィールドネットワークを用いた高速連想メモリ

    佐々木寛弥,森江隆,岩田穆

    電子情報通信学会 信学技報   55 - 60   2003.11

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  • 抵抗ネットワークの過渡状態を利用するガボール型フィルタ回路

    森江隆,梅澤淳,岩田穆

    電子情報通信学会 信学技報   13 - 18   2003.11

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  • A Convolutional Neural Network VLSI for Image Recognition Using Merged/Mixed Analog-Digital Architecture Reviewed

    K. Korekado,T. Morie,O. Nomura,H. Ando,T. Nakano,M. Matsugu,A. Iwata

    Knowledge-Based Intelligent Information and Engineering Systems (KES2003)   2   169 - 176   2003.09

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    イギリス   オックスフォード   2003.09.03  -  2003.09.05

  • A Face/Object Recognition System Using FPGA Implementation of Coarse Region Segmentation Reviewed

    T. Nakano,T. Morie,and A. Iwata

    SICE Annual Conference 2003   1418 - 1423   2003.08

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    福井   2003.08.04  -  2003.08.06

  • Coarse Image Region Segmentation Using Resistive-fuse Networks Implemented in FPGA Reviewed

    T. Nakano,H. Ando,H. Ishizu,T. Morie,A. Iwata

    The 7th World Multiconference on Systemics, Cybernetics and Informatics (SCI 2003) Proceedings   IV   186 - 191   2003.07

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    アメリカ   オーランド   2003.07.27  -  2003.07.30

  • A Multi-Nanodot Floating-Gate MOSFET Circuit for Spiking Neuron Models Reviewed

    T. Morie,T. Matsuura,M. Nagata,A. Iwata

    IEEE Transactions on Nanotechnology   2 ( 3 )   158 - 164   2003.04

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  • Pulse Modulation VLSI Implementation of Clustering Algorithm Based on Stochastic Association Model Reviewed

    T. Morie,T. Matsuura,A. Iwata

    Artificial Neural Networks and Neural Information Processing ICANN/ICONIP 2003 International Conference Supplementary Proceedings   434 - 437   2003.04

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    トルコ   イスタンブール   2003.04  -  2003.04

  • 大局的画像領域分割のためのデジタル方式抵抗ヒューズネットワークの設計とFPGAへの実装

    中野鉄平,森江隆,安藤博士,石津任章,岩田穆

    電子情報通信学会技術研究報告(ICD)   2003.03

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  • パルスタイミングに基づくスパイキングホップフィールドネットワークによる高速連想メモリ

    佐々木寛弥,森江隆,伊井慎一郎,岩田穆

    電子情報通信学会技術研究報告(NC)   2002.11

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  • A Cellular-Automaton-Type Image Extraction Algorithm and Its Implementation Using an FPGA Reviewed

    T. Nakano,T. Morie,M. Nagata,A. Iwata

    Proceedings of IEEE Asia-Pacific Conference on Circuits and Systems   2   197 - 200   2002.10

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    インドネシア   バリ   2002.10.30  -  2002.10.30

  • 自律移動ロボット用のビジョンシステムと画素選択処理機能を有する並列マッチングプロセッサの開発

    山本美子,武田幹雄,渡部悠紀,岩田穆,森江隆,渡邊睦

    電子情報通信学会技術研究報告(DSP,ICD,IE)   2002.10

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  • 画像処理IPとFPGA実装

    石津任章,武田幹雄,馬場祥宏,佐野誠,藤原義也,原正純,森江隆,岩田穆

    電子情報通信学会技術研究報告(DSP,ICD,IE)   2002.10

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  • An Image Region Extraction LSI Based on a Merged/Mixed-Signal Nonlinear Oscillator Network Circuit Reviewed

    H. Ando,T. Morie,M. Nagata,A. Iwata

    28th European Solid-State Circuits Conference   703 - 706   2002.09

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    イタリア   Florence, Italy   2002.09.26  -  2002.09.26

  • 適応型CMOSイメージセンサ

    今村俊文,山本美子,岩田穆,石津任章,森江 隆

    電子情報通信学会技術研究報告(ICD)   2002.09

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  • An Hadamard Transform Chip Using the PWM Circuit Technique and Its Application to Image Processing Reviewed

    K. Katayama,M. Nagata,T. Morie,A. Iwata

    IEICE Transactions on Electronics   E85-C ( 8 )   1596 - 1603   2002.08

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  • A Multi-Nanodot Floating-Gate MOSFET Circuit for Spiking Neuron Models Reviewed

    T. Morie,T. Matsuura,M. Nagata,A. Iwata

    2002 IEEE Silicon Nanoelectronics Workshop   53 - 54   2002.06

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    アメリカ   Honolulu, Hawaii   2002.06.09  -  2002.06.09

  • A Multi-Nano-Dot Circuit and Structure Using Thermal-Noise Assisted Tunneling for Stochastic Associative Processing Reviewed

    T. Morie,T. Matsuura,M. Nagata,A. Iwata

    Journal of Nanoscience and Nanotechnology   2 ( 3 )   343 - 349   2002.06

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  • Modeling Substrate Noise Generation in CMOS Digital Integrated Circuits Reviewed

    M. Nagata,T. Morie,A. Iwata

    IEEE 2002 Custom Integrated Circuit Conference   501 - 504   2002.05

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    Orlando   2002.05.12  -  2002.05.15

  • Image Segmentation/Extraction Using Nonlinear Cellular Networks and their VLSI Implementation Using Pulse-Modulation Techniques Reviewed

    IEICE Trans. Fundamentals   E85-A ( 2 )   381 - 388   2002.04

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  • An Efficient Clustering Algorithm Using Stochastic Association Model and Its Implementation Using Nanostructures Reviewed

    T. Morie,T. Matsuura,M. Nagata,and A. Iwata

    Advances in Neural Information Processing Systems 14,MIT Press   1115 - 1122   2002.04

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    2002.04  -  2002.04

  • Substrate Noise Analysis with Compact Digital Noise Injection and Substrate Models Reviewed

    M. Nagata,Y. Murasaka,Y. Nishimori,T. Morie,and A. Iwata

    Proc. 7th Asia and South Pacific Design Automation Conference   71 - 76   2002.04

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    2002.04  -  2002.04

  • アナログ・ディジタル融合回路による視覚情報処理アーキテクチャ(特別招待論文)

    岩田穆,森江隆

    電子情報通信学会 信学技報   2002.04

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  • Physical Design Guides for Substrate Noise Reduction in CMOS Digital Circuits Reviewed

    IEEE Journal of Solid-State Circuits   36 ( 3 )   539 - 549   2001.04

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  • Merged Analog-Digital Circuits Using Pulse Modulation for Intelligent SoC Applications Reviewed

    IEICE Transactions on Fundamentals   E84-A ( 2 )   486 - 496   2001.04

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  • A PWM Analog Memory Programming Circuit for Floating-Gate MOSFETs with 75us Programming Time and 11b Updating Resolution Reviewed

    IEEE Journal of Solid-State Circuits   36 ( 8 )   1286 - 1290   2001.04

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  • A CMOS Stochastic Associative Processor Using PWM Chaotic Signals Reviewed

    IEICE Trans. Electronics   E84-C ( 12 )   1723 - 1729   2001.04

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  • A 1-D CMOS PWM Cellular Neural Network Circuit and Resistive-Fuse Network Operation Reviewed

    Extended Abstracts of the 2001 Int. Conf. Solid State Devices and Materials(SSDM2001)   90 - 91   2001.04

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    2001.04  -  2001.04

  • Bio-Inspired VLSIs Based on Analog/Digital Merged Technologies Reviewed

    Extended Abstracts of the 2001 Int. Conf. Solid State Devices and Materials (SSDM2001)   88 - 89   2001.04

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    2001.04  -  2001.04

  • Chip-Level Substrate Noise Analysis with Network Reduction by Fundamental Matrix Computation Reviewed

    Proceedings of International Symposium on Quality Electronic Design (ISQED2001)   482 - 487   2001.04

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    2001.04  -  2001.04

  • Effects of Power-Supply Parasitic Components on Substrate Noise Generation in Large-Scale Digital Circuits Reviewed

    Symposium on VLSI Circuits   159 - 162   2001.04

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    2001.04  -  2001.04

  • Design of a Pixel-Parallel Feature Extraction VLSI System for Biologically-Inspired Object Recognition Methods Reviewed

    Proc. International Symposium on Nonlinear Theory and its Application (NOLTA2001)   371 - 374   2001.04

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    2001.04  -  2001.04

  • Test Circuits for Substrate Noise Evaluation in CMOS Digital ICs Reviewed

    Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC2001)   13 - 14   2001.04

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    2001.04  -  2001.04

  • Quantum Dot Structures Measuring Hamming Distance for Associative Memories Reviewed

    Superlattices & Microstructures   27 ( 5/6 )   613 - 616   2000.04

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  • A single-electron stochastic associative processing circuit robust to random background-charge effects and its structure using nanocrystal floating-gate transistors Reviewed

    Nanotechnology   11 ( 3 )   154 - 160   2000.04

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  • A Nonlinear Oscillator Network for Gray-level Image Segmentation and PWM/PPM Circuits for Its VLSI Implementation Reviewed

    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences   E83-A ( 2 )   329 - 336   2000.04

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  • Measurements and Analyses of Substrate Noise Waveform in Mixed Signal IC Environment Reviewed

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems   19 ( 6 )   671 - 678   2000.04

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  • Wafer-assisted Repair of Plasma-induced damage in the Silicon/Silicon-dioxide System Reviewed

    Journal of Vacuum Science & Technology B   18 ( 3 )   1268 - 1275   2000.04

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  • CMOS Circuits Generating Arbitrary Chaos by Using Pulse Width Modulation Techniques Reviewed

    IEEE Transactions on Circuits and Systems-I   47 ( 11 )   1652 - 1657   2000.04

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  • Reduced Substrate Noise Digital Design for Improving Embedded Analog Performance Reviewed

    2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC2000)   224 - 225   2000.04

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    2000.04  -  2000.04

  • A Multi-Functional Cellular Neural Network Circuit Using Pulse Modulation Signals for Image Recognition Reviewed

    Proceedings of 7th International Conference on Neural Information Processing (ICONIP-2000)   613 - 617   2000.04

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    2000.04  -  2000.04

  • A High-Resolution Hadamard Transform Circuit Using Pulse Width Modulation Technique Reviewed

    Extended Abstracts of the 2000 InternationalConference on Solid State Devices and Materials (SSDM2000)   366 - 367   2000.04

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    2000.04  -  2000.04

  • A Multi-Quantum-Dot Associative Circuit Using Thermal-Noise Assisted Tunneling Reviewed

    Extended Abstracts of the 2000 InternationalConference on Solid State Devices and Materials (SSDM2000)   306 - 307   2000.04

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    2000.04  -  2000.04

  • Quantitative Characterization of Substrate Noise for Physical Design Guides in Digital Circuits Reviewed

    Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (CICC2000)   95 - 98   2000.04

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    2000.04  -  2000.04

  • Pulse Modulation Circuit Architecture and its Application to Functional Image Sensors Reviewed

    Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS2000)   Ⅱ   301 - 304   2000.04

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    2000.04  -  2000.04

  • Quantum Dot Structures Measuring Hamming Distance for Associative Memories Reviewed

    Extended Abstracts, 4th International Workshop on Quantum Functional Devices (QFD2000)   210 - 213   2000.04

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    2000.04  -  2000.04

  • Image Object Extraction using Resistive-Fuse and Oscillator Networks and a Pulse-Modulation Circuit for their LSI Implementation Reviewed

    Extended Abstracts of the 2000 International Conference on Solid State Devices and Materials (SSDM2000)   368 - 369   2000.04

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    2000.04  -  2000.04

  • An Arbitrary Chaos Generator Core Circuit Using PWM/PPM Signals Reviewed

    Proceedings of the Asia and South Pacific Design Automation Conference(ASP-DAC2000)   23 - 24   2000.04

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    2000.04  -  2000.04

  • A Smart Imager for the Vision Processing Front-end Reviewed

    Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC2000)   19 - 20   2000.04

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    2000.04  -  2000.04

  • Analog LSI Implementation of Self-Learning Neural Networks Reviewed

    Computers and Electrical Engineering   25 ( 5 )   339 - 355   1999.04

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  • An Analog-Digital Merged Neural Circuit Using Pulse Width Modulation Technique Reviewed

    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences   E82-A ( 2 )   356 - 363   1999.04

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  • The Architecture of Delta Sigma Analog-to-Digital Converter using Voltage-Controlled Oscillator as a Multibit Quantizer Reviewed

    IEEE Transactions on Circuits and Systems-II   46 ( 7 )   941 - 945   1999.04

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  • New Non-Volatile Analog Memory Circuits Using PWM Methods Reviewed

    IEICE Transactions on Electronics   E82-C ( 9 )   1655 - 1661   1999.04

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  • A Pattern Matching Processor Using Analog-Digital Merged Architecture Based on Pulse Width Modulation Reviewed

    Extended Abstracts of the 1999 InternationalConference on Solid State Devices and Materials (SSDM'99)   98 - 99   1999.04

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    1999.04  -  1999.04

  • A Nonlinear Oscillator Network Circuit for Image Segmentation with Double-threshold Phase Detection Reviewed

    9th International Conference on Artificial Neural Networks(ICANN'99)   655 - 660   1999.04

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    1999.04  -  1999.04

  • Nonlinear Dynamical Systems Utilizing Pulse Modulation Signals and A CMOS Chip Generating Arbitrary Chaos Reviewed

    Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy and Bio-inspired Systems (MicroNeuro'99)   254 - 260   1999.04

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    1999.04  -  1999.04

  • A Stochastic Association Circuit Using PWM Chaotic Signals Reviewed

    Extended Abstracts of the 1999 International Conference on Solid State Devices and Materials (SSDM'99)   100 - 101   1999.04

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    1999.04  -  1999.04

  • A Smart CMOS Imager with Pixel Level PWM Signal Processing Reviewed

    1999 Symposium on VLSI Circuits Digest of Technical Papers   141 - 144   1999.04

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    1999.04  -  1999.04

  • Measurements and Analyses of Substrate Noise Waveform in Mixed Signal IC Environment Reviewed

    Proceedings of the IEEE 1999 Custom Integrated Circuits Conference (CICC'99)   575 - 578   1999.04

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    1999.04  -  1999.04

  • A Stochastic Associative Memory Using Single-Electron Tunneling Devices Reviewed

    IEICE Transactions on Electronics   E81-C ( 1 )   30 - 35   1998.04

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  • Nonlinear Function Generators and Chaotic Signal Generators Based on Pulse-Phase Modulation Reviewed

    Proceedings of the 5th International Conference on Neural InformationProcessing (ICONIP'98)   582 - 585   1998.04

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    1998.04  -  1998.04

  • An Architecture of Delta-Sigma A-to-D Converters using a Voltage Controlled Oscillator as a Multi-bit Quantizer Reviewed

    Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS'98)   I   389 - 392   1998.04

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    1998.04  -  1998.04

  • Oscillator Networks for Image Segmentation and Their Circuits Using Pulse Modulation Methods Reviewed

    Proceedings of the 5th International Conference on Neural Information Processing (ICONIP'98)   586 - 589   1998.04

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    1998.04  -  1998.04

  • LSI Implementation of Neural Networks Using A Pulse-Width Modulation Method Reviewed

    Proceedings of the 5th International Conference on Soft Computing and Information/Intelligent Systems (IIZUKA'98)   118 - 121   1998.04

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    1998.04  -  1998.04

  • Stochastic Associative Memory Using Single-Electron Devices and Its Application to Digit Pattern Association Reviewed

    Extended Abstracts of the 1998 International Conference on Solid State Devices and Materials (SSDM'98)   190 - 191   1998.04

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    1998.04  -  1998.04

  • Pulse Modulation Circuit Techniques for Nonlinear Dynamical Systems Reviewed

    Proceedings 1998 International Symposium on Nonlinear Theory and its Application (NOLTA'98)   447 - 450   1998.04

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    1998.04  -  1998.04

  • Novel Line-Test Methods Using A Subscriber Line Interface Circuit

    Electronics and Communications in Japan, Part 1   81 ( 1 )   22 - 30   1998.04

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  • Nonlinear function generators and chaotic signal generators using a pulse-width modulation method Reviewed

    Electronics Letters   33 ( 16 )   1351 - 1352   1997.04

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  • Self-Learning Neural Network LSI with High-Resolution Non-Volatile Analog Memory Reviewed

    Proceedings International Conference on Neural Networks (ICNN'95)   IV   1628 - 1632   1995.04

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    1995.04  -  1995.04

  • Analog LSI Implementation of Self-Learning Neural Networks Reviewed

    Proceedings of the 3rd International Conference on Fuzzy Logic, Neural Nets and Soft Computing (IIZUKA'94)   565 - 566   1994.04

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    1994.04  -  1994.04

  • Analog VLSI Implementation of Adaptive Algorithms by an Extended Hebbian Synapse Circuit Reviewed

    Proceedings of Third Australian Conference on Neural Networks (ACNN'92)   21 - 24   1992.04

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    1992.04  -  1992.04

  • A Submicrometer Megabit DRAM Process Technology Using Trench Capacitors Reviewed

    IEEE J. Solid-State Circuits   SC-20 ( 1 )   130 - 136   1985.04

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  • Electrical Characteristics of Isolation-Merged Vertical Capacitor (IVEC) Cell Reviewed

    1985 Symposium on VLSI Technology Digest of Technical Papers   88 - 89   1985.04

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    1985.04  -  1985.04

  • Trench Coverage Characteristics of Polysilicon Deposited by Thermal Decomposition of Silane Reviewed

    Japanese Journal of Applied Physics   23 ( 7 )   L482 - L484   1984.04

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  • An Isolation-merged Vertical Capacitor Cell for Large Capacity DRAM Reviewed

    Proceedings of the International Electron Device Meeting (IEDM'84)   240 - 243   1984.04

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    1984.04  -  1984.04

  • Depletion Trench Capacitor Technology for Megabit Level MOS dRAM Reviewed

    IEEE Electron Device Letters   4 ( 11 )   411 - 414   1983.04

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  • Depletion Trench Capacitor Cell Reviewed

    Extended Abstracts of 15th Conference Solid State Devices and Materials (SSDM'83)   253 - 256256   1983.04

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    1983.04  -  1983.04

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Publications (Books)

  • Learning on Silicon

    T. Morie(Sole author)

    Kluwer Academic Publishers  1999.04 

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  • Shadow Elimination Mimicking the Human Visual System

    T. Kamada,A. Hanazawa,T. Morie(Joint author)

    Brain-Inspired Information Technology (Studies in Computational Intelligence)  2009.11 

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  • An FPGA-Based Collision Warning System Using Moving-Object Detection Inspired by Neuronal Propagation in the Hippocampus

    H. Liang,Y. Suzuki,T. Morie,K. Nakada,T. Miki,H. Hayashi(Joint author)

    Brain-Inspired Information Technology (Studies in Computational Intelligence)  2009.11 

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  • Real-Time Human-Machine Interaction System Based on Face Authentication and Arm Posture Recognition

    I. R. Khan,T. Morie,H. Miyamoto,Y. Kuriya,M. Shimizu(Joint author)

    Brain-Inspired Information Technology (Studies in Computational Intelligence),   2009.11 

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Conference Prsentations (Oral, Poster)

  • 家庭用サービスロボットのための海馬-嗅内皮質モデルにおける場のオブジェクト表現と統合

    前田 優輔, 立野 勝巳, 森江 隆

    電子情報通信学会 NC研究会 

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    Event date: 2020.01.25   Language:Japanese  

  • CMOSカオスボルツマンマシン回路のリザバー計算への応用

    上村 大地, 山口 正登志, 香取 勇一, 田向 権, 森江 隆

    電気学会 電子回路研究会 

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    Event date: 2019.12.18 - 2019.12.19   Language:Japanese  

  • FeFETを用いた時間領域アナログ積和演算回路の性能評価

    原田 將敬, 森江 隆, 高橋 光恵, 酒井 滋樹

    第80回応用物理学会 秋季学術講演会 

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    Event date: 2019.09.18 - 2019.09.21   Language:Japanese  

  • 海馬・扁桃体・前頭前野の機能を統合した脳型人工知能モデル

    田中 悠一朗, 田向 権, 立野 勝巳, 香取 勇一, 森江 隆

    第29回 日本神経回路学会 全国大会(JNNS 2019) 

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    Event date: 2019.09.04 - 2019.09.05   Language:Japanese  

  • 時間領域アナログ積和演算方式を用いた演算効率300TOPS/W人工知能向けCMOSバイナリコネクトネットワーク回路

    山口 正登志, 岩元 剛毅, 田向 権, 森江 隆

    LSIとシステムのワークショップ 

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    Event date: 2019.05.13 - 2019.05.14   Language:Japanese  

  • CMOSカオスボルツマンマシン回路の最適化問題への応用

    長 佳蓉子, 白水 孝始, 山口 正登志, 村上 秀樹, 森江 隆

    第72回電気・情報関係学会九州支部連合大会 

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    Event date: 2019.09.27   Language:Japanese  

  • CuとTaを上部電極に用いたTa2O5-δ多値抵抗変化メモリの特性評価

    李 遠霖, 福地 厚, 有田 正志, 森江 隆, 高橋 庸夫

    電子情報通信学会 電子デバイス研究会 

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    Event date: 2019.05.16   Language:Japanese  

  • 高抵抗動作を目指したCu上部電極型Ta2O5-δ抵抗変化多値メモリ

    李 遠霖, 福地 厚, 有田 正志, 高橋 庸夫, 森江 隆

    第66回応用物理学会 春季学術講演会 

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    Event date: 2019.03.09 - 2019.03.12   Language:Japanese  

  • FeFETを用いた時間領域アナログ積和演算回路の特性評価

    原田 將敬, 森江 隆, 高橋 光恵, 酒井 滋樹

    第66回応用物理学会 春季学術講演会 

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    Event date: 2019.03.09 - 2019.03.12   Language:Japanese  

  • 家庭用サービスロボットのための海馬-嗅内皮質の集積回路モデル

    下留 諒, 川内 聖士, 高田 健介, 立野 勝巳, 田向 権, 森江 隆

    電子情報通信学会 ニューロコンピューティング研究会 

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    Event date: 2019.01.23   Language:Japanese  

  • A Hippocampal Spiking Neural Network Model for Path-Dependent Place Cells

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    Event date: 2018.10.24 - 2018.10.27   Language:English  

  • Research and development of service robots by competition activities

    The Proceedings of JSME annual Conference on Robotics and Mechatronics (Robomec) 

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    Event date: 2018.06   Language:Japanese  

    CiNii Article

  • 酸素欠陥を導入したTa_2O_5-・抵抗変化型多値メモリ特性の検討

    李 遠霖, 勝村 玲音, Mika Kristian Gronroos, 福地 厚, 有田 正志, 安藤 秀幸, 森江 隆, 高橋 庸夫

    第65回応用物理学会 春季学術講演会 

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    Event date: 2018.03.17 - 2018.03.20   Language:Japanese  

  • Analog Memory Operation of Parallel Connected Resistance Change Memory Devices

    M. Harada, H. Ando, T. Morie, A. T. Fukuchi, M. Arita, Y. Takahashi, S. Samukawa

    Seventeenth Int. Symp. on Advanced Fluid Information (AFI-2017) 

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    Event date: 2017.11.01 - 2017.11.03   Language:English  

  • 時間領域アナログニューラル計算ハードウェアのための不揮発性アナログメモリデバイスの評価

    原田 將敬, 安藤 秀幸, 福地 厚, 有田 正志, 高橋 庸夫, 高橋 光恵, 酒井 滋樹, 森江 隆

    第27回日本神経回路学会全国大会(JNNS2017) 

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    Event date: 2017.09.20 - 2017.09.22   Language:Japanese  

  • カオスボルツマンマシンのアナログハードウェア実装

    山口 正登志, 岩元 剛毅, 鈴木 秀幸, 田向 権, 森江 隆

    第27回日本神経回路学会全国大会(JNNS2017) 

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    Event date: 2017.09.20 - 2017.09.22   Language:Japanese  

  • カオスボルツマンマシンのFPGA実装

    川島 一郎, 山口 正登志, 鈴木 秀幸, 森江 隆, 田向 権

    第27回日本神経回路学会全国大会(JNNS2017) 

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    Event date: 2017.09.20 - 2017.09.22   Language:Japanese  

  • 時間領域アナログ荷重加算回路法のCMOS VLSI回路を用いた評価

    岩元 剛毅, 王 権, 山口 正登志, 田向 権, 森江 隆

    第27回日本神経回路学会全国大会(JNNS2017) 

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    Event date: 2017.09.20 - 2017.09.22   Language:Japanese  

  • 乱数生成器不要の簡略型Dropoutアルゴリズム

    ヨー ヨンジェ, 森江 隆, 田向 権

    第27回日本神経回路学会全国大会(JNNS2017) 

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    Event date: 2017.09.20 - 2017.09.22   Language:Japanese  

  • CMOSカオスボルツマンマシン回路の設計と評価

    山口 正登志, 岩元 剛毅, 田向 権, 鈴木 秀幸, 森江 隆

    電気学会 電子・情報・システム部門大会 

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    Event date: 2017.09.06 - 2017.09.07   Language:Japanese  

  • 時間領域積和演算回路のためのFeFETアナログ記憶特性評価

    原田 將敬, 森江 隆, 高橋 光恵,酒井 滋樹

    第78回応用物理学会 秋季学術講演会 

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    Event date: 2017.09.05 - 2017.09.08   Language:Japanese  

  • カオスボルツマンマシンのアナログ集積回路実装

    山口 正登志, 田向 権, 鈴木 秀幸, 森江 隆

    電子情報通信学会 総合大会 

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    Event date: 2017.03.22 - 2017.03.25   Language:Japanese  

  • 効率的なFPGA実装のためのハードウェア指向ニューラルネットワーク

    田向 権, 堀 三晟, 鈴木章央, 森江 隆

    電子情報通信学会 総合大会 

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    Event date: 2017.03.22 - 2017.03.25   Language:Japanese  

  • 異なる上部電極を有するTa2O5抵抗変化型メモリの多値特性評価

    勝村 玲音, 李 遠霖, Mika Gronroos, 福地 厚, 有田 正志, 高橋 庸夫, 安藤 秀幸, 森江 隆

    第64回応用物理学会 春季学術講演会 

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    Event date: 2017.03.14 - 2017.03.17   Language:Japanese  

  • 多並列接続Cu-MoOx-Al抵抗変化型メモリのアナログメモリ動作

    原田 將敬, 安藤 秀幸, 森江 隆, 勝村 玲音, 福地 厚, 有田 正志, 高橋 庸夫

    第64回応用物理学会 春季学術講演会 

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    Event date: 2017.03.14 - 2017.03.17   Language:Japanese  

  • Analog CMOS VLSI Implementation of Chaotic Boltzmann Machines

    M. Yamaguchi, H. Tamukoh, H. Suzuki, T. Morie

    The 5th RIEC Int. Symp. on Brain Functions and Brain Computer 

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    Event date: 2017.02.27 - 2017.02.28   Language:English  

  • Hardware Oriented Random Number Generation Method for Restricted Boltzmann Machines

    S. Hori, T. Morie, H. Tamukoh

    The 5th RIEC Int. Symp. on Brain Functions and Brain Computer 

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    Event date: 2017.02.27 - 2017.02.28   Language:English  

  • Stacked Autoencoders with Shared Synapse Architecture for Digital Hardware Implementation

    A. Suzuki, T. Morie, H. Tamukoh

    The 5th RIEC Int. Symp. on Brain Functions and Brain Computer 

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    Event date: 2017.02.27 - 2017.02.28   Language:English  

  • Spike-based Neural Learning Hardware Using a Resistance Change Memory Device toward Brain-like Systems with Nanostructures

    H. Ando, K. Tomizaki, T. Tohara, T. Morie, A. T. Fukuchi, M. Arita, Y. Takahashi, S. Samukawa

    Sixteenth Int. Symp. on Advanced Fluid Information (AFI-2016) 

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    Event date: 2016.10.10 - 2016.10.12   Language:English  

  • ナノドットアレイデバイスのためのアナログメモリ素子制御の検討

    曹 民圭, 勝村 玲音, 福地 厚, 有田 正志, 高橋 庸夫, 安藤 秀幸, 森江 隆

    第77回応用物理学会 秋季学術講演会 

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    Event date: 2016.09.13 - 2016.09.16   Language:Japanese  

  • Ta/Ta2O5抵抗変化型メモリの多値・アナログメモリ動作の検討

    勝村 玲音, M. K. Gronroos, 福地 厚, 有田 正志, 高橋 庸夫, 安藤 秀幸, 森江 隆

    第77回応用物理学会 秋季学術講演会 

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    Event date: 2016.09.13 - 2016.09.16   Language:Japanese  

  • 連想メモリ用スピンホール発振器アレイ

    工藤 究, 森江 隆

    第77回応用物理学会 秋季学術講演会 

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    Event date: 2016.09.13 - 2016.09.16   Language:Japanese  

  • 抵抗変化型メモリ素子を用いたスパイクタイミングによるニューラル学習回路

    安藤 秀幸, 富崎 和正, 森江 隆, 福地 厚, 有田 正志, 高橋 庸夫

    電気学会 電子・情報・システム部門大会 

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    Event date: 2016.08.31 - 2016.09.02   Language:Japanese  

  • FPGAによるROS向け高速分散処理システムの実装

    石田 裕太郎, 堀 三晟, 森江 隆, 田向 権

    第60回システム制御情報学会研究発表講演会(SCI'16) 

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    Event date: 2016.05.25 - 2016.05.27   Language:Japanese  

  • Si MOSFET上に作製したCu-MoOx-Al抵抗変化型メモリを用いたSTDP制御回路とその評価

    富崎 和正, 森江 隆, 安藤 秀幸, 福地 厚, 有田 正志, 高橋 庸夫

    電子情報通信学会 NC研究会 

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    Event date: 2016.03.22   Language:English  

  • カオスボルツマンマシンのディジタルハードウェア実装に関する検討

    川島 一朗, 上ノ原 誠二, 加藤 孝史, 山口 正登志, 鈴木 秀幸, 森江 隆, 田向 権

    電子情報通信学会2016年総合大会 

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    Event date: 2016.03.15 - 2016.03.16   Language:Japanese  

  • Analog Memory Operation of Resistance Change Memory with MOSFET for Brain-like LSIs

    H. Ando, K. Tomizaki, T. Tohara, T. Morie, T. Hiroi, A. Nakane, R. Katsumura, A. Fukuchi, M. Arita, Y. Takahashi, S. Samukawa

    Fifteenth Int. Symp. on Advanced Fluid Information (AFI-2015) 

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    Event date: 2015.10.27 - 2015.10.29   Language:English  

  • カオスボルツマンマシンのCMOS回路化

    加藤 孝史, 上ノ原 誠二, 鈴木 秀幸, 田向 権, 森江 隆

    電子情報通信学会 基礎・境界ソサイエティ大会  電子情報通信学会

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    Event date: 2015.09.08 - 2015.09.11   Language:Japanese  

  • パルス結合位相振動子ネットワークのディジタル回路実装とその応用

    田向 権, 末富 康寛, 松坂 建治, 田中 宙夫, 森江 隆

    電子情報通信学会 NC研究会  電子情報通信学会

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    Event date: 2015.01.29 - 2015.01.30   Language:Japanese  

  • スパイク列フィルタとして動作するスパイキングカオス振動子回路

    山口 正登志, 上ノ原 誠二, 森江 隆

    電子情報通信学会 NLP研究会  電子情報通信学会

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    Event date: 2015.01.26 - 2015.01.27   Language:Japanese  

  • Intelligent Information Processing Circuits Using Nanodisk Array Structure

    Fourteenth Int. Symp. on Advanced Fluid Information and Transdisciplinary Fluid Integration (AFI/TFI 2013) 

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    Event date: 2014.10.09   Language:English  

  • デバイスミスマッチに頑健なPWM方式CMOS結合回路

    上ノ原 誠二, 厚地 泰輔, 松坂 建治, 田向 権, 森江 隆, 合原 一幸

    電気学会 電子回路研究会 

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    Event date: 2014.01.23   Language:English  

  • パルス結合位相振動子ネットワークのCMOS集積回路化とその評価

    宮代 祐也, 松坂 建治, 東原 敬, 田中 宙夫, 田向 権, 森江 隆

    電気学会電子回路研究会 

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    Event date: 2013.11.29   Language:Japanese  

  • Intelligent Information Processing Circuits Using Nanodisk Array Structure

    Proc. of the Thirteenth Int. Symp. on Advanced Fluid Information and Transdisciplinary Fluid Integration (AFI/TFI 2013) 

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    Event date: 2013.11.25 - 2013.11.26   Language:English  

  • A Spiking Neural Network System with a Merged Analog/Digital LSI Chip Controlled by an FPGA

    The 3rd Int. Symp. on Innovative Mathematical Modelling 

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    Event date: 2013.11.12 - 2013.11.15   Language:English  

  • A PWM-mode CMOS Coupled Map Lattice Circuit Robust to Device Mismatches

    The 3rd Int. Symp. on Innovative Mathematical Modelling 

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    Event date: 2013.11.12 - 2013.11.15   Language:English  

  • A Human Detection/Tracking System Using RGB-D Sensor for Service Robots

    Int. Workshop on Machine Vision for Industrial Innovation (MVII2013) 

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    Event date: 2013.10.20 - 2013.10.21   Language:English  

  • Coupled MRF Models for Coarse Image Region Segmentation and Their VLSI Implementation

    Int. Workshop on Machine Vision for Industrial Innovation (MVII2013) 

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    Event date: 2013.10.20 - 2013.10.21   Language:English  

  • A Coupled MRF Model for Coarse Image Region Segmentation and Its VLSI Implementation

    Int. Workshop on Machine Vision for Industrial Innovation (MVII2013) 

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    Event date: 2013.10.20 - 2013.10.21   Language:English  

  • 脳型情報処理ハードウェア実現に向けたパルス結合位相振動子に基づくスパイクベース演算

    松坂 建治, 田中 秀樹, 大久保 悟, 東原 敬, 森江 隆

    2013年度 人工知能学会全国大会 

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    Event date: 2013.06.04 - 2013.06.07   Language:Japanese  

  • FinFETとナノディスクアレイ構造を結合したニューロンデバイス

    東原 敬, 梁 海超, 遠藤 和彦, 五十嵐 誠, 寒川 誠二, 昌原明植, 森江 隆

    第60回応用物理学会春季学術講演会 

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    Event date: 2013.03.27 - 2013.03.30   Language:Japanese  

  • LSI実装に向けたパルス結合位相振動子系に基づくスパイクベース演算

    松坂 建治

    電子情報通信学会 NC研究会 

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    Event date: 2012.10.04 - 2012.10.05   Language:Japanese  

  • トマト果実自動収穫のためのKinectセンサを利用した果実・萼位置検出手法,

    田中 宙夫, 松原 弘樹

    画像の認識・理解シンポジウム(MIRU) 

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    Event date: 2012.08.06 - 2012.08.08   Language:Japanese  

  • Biologically-inspired Learning Device using Three-terminal Ferroelectric Memristor

    M. Ueda, Y. Kaneko, Y. Nishitani, T. Morie and E. Fujii,

    70th Device Research Conference (DRC), 

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    Event date: 2012.06.18 - 2012.06.20   Language:English  

    [Collaboration with Panasonic]

  • 大局的画像領域分割のための領域ベース結合MRFモデルを実現するPWM方式画素回路アレイ,

    松坂 建治

    LSIとシステムのワークショップ 

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    Event date: 2012.05.28 - 2012.05.30   Language:Japanese  

  • Torus-Doubling Bifurcation and Torus-Doubling Process via Strange Nonchaotic Attractors,

    T. Mitsui

    2nd Int. Symp. on Innovative Mathematical Modelling 

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    Event date: 2012.05.15 - 2012.05.18   Language:English  

  • Experimental Evaluation of Synchronization in an SNA-chaos Region

    S. Uenohara

    2nd Int. Symp. on Innovative Mathematical Modelling 

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    Event date: 2012.05.15 - 2012.05.18   Language:English  

  • A Si Nanodisk Array Structure for Spiking Neuron Models

    East-Asia Inter-University Workshop on Brain Engineering (EAW2011) 

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    Event date: 2011.02.28   Language:English  

  • Face/Arm-Posture Recognition System with Face Height Estimation Using Stereo Vision and Arm Model Matching

    East-Asia Inter-University Workshop on Brain Engineering (EAW2011) 

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    Event date: 2011.02.28   Language:English  

  • Bicycle Detection Using Pedaling Movement by Spatiotemporal Gabor Filtering

    East-Asia Inter-University Workshop on Brain Engineering (EAW2011) 

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    Event date: 2011.02.28   Language:English  

  • Fundamental Study on Spiking Neuron Devices

    Proc. of the Tenth Int. Symp. on Advanced Fluid Information and Transdisciplinary Fluid Integration (AFI/TFI 2010) 

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    Event date: 2010.11.01 - 2010.11.03   Language:English  

  • Extracting Obstacles from a Video Taken by a Moving Camera

    Annual Conf. of Biomedical Fuzzy System Association (BMFSA) 

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    Event date: 2010.10.09 - 2010.10.10   Language:English  

  • HOG特徴量を用いた人の身体方向検出

    第23回バイオメディカル・ファジィ・システム学会年次大会 講演論文集 

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    Event date: 2010.10.09 - 2010.10.10   Language:Japanese  

  • Si量子ナノディスク2次元アレイ構造の電気特性の構造による制御

    第71回応用物理学会学術講演会 

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    Event date: 2010.09.14   Language:Japanese  

  • Face/Arm-Posture Recognition with Face Height Estimation Using Stereo Vision

    Proc. of the 10th POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2010.08.24   Language:English  

  • On Detecting a Human Body Direction Using an Image Information

    SICE Annual Conference 2010 

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    Event date: 2010.08.18 - 2010.08.21   Language:English  

  • 車載画像処理のための白線を利用した影検出・除去システム

    第16回画像センシングシンポジウム(SSII10) 

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    Event date: 2010.06.11   Language:Japanese  

  • 挙動認識のための人及び身体方向検出手法

    第16回画像センシングシンポジウム(SSII10) 

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    Event date: 2010.06.10   Language:Japanese  

  • 時空間ガボールフィルタによる土砂災害前兆現象検知における気象条件の影響評価

    電子情報通信学会 総合大会 

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    Event date: 2010.03.19   Language:Japanese  

  • ステレオカメラ映像からの歩行者検出

    第8回ITSシンポジウム2009 

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    Event date: 2009.12.11   Language:Japanese  

  • 物体検出のための移動カメラを用いた前景と背景の分離

    第8回ITSシンポジウム2009 

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    Event date: 2009.12.10   Language:Japanese  

  • Coarse Image Edge Detection Using Self-adjusting Resistive-fuse Networks

    H. Liang

    Proc. of IEEE Seoul Section 2009, Int. Student Paper Contes 

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    Event date: 2009.12.05   Language:English  

  • Fundamental Study on Spiking Neuron Devices,

    Proc. of the Ninth Int. Symp. on Advanced Fluid Information and Transdisciplinary Fluid Integration 

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    Event date: 2009.11.04   Language:English  

  • ナノディスクアレイ構造を用いたスパイキングニューロンデバイスの回路シミュレーション

    第70回応用物理学会学術講演会 

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    Event date: 2009.09.10   Language:Japanese  

  • 大局的画像領域分割のための領域ベース結合MRFモデルを実現するCMOS回路

    電気学会 電子・情報・システム部門大会 

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    Event date: 2009.09.04   Language:Japanese  

  • 光源の色情報を用いた影検出除去

    第8回情報科学技術フォーラム 

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    Event date: 2009.09.02   Language:Japanese  

  • A Simplified Region-based Coupled MRF Model for Coarse Image Region Segmentation

    Proc. of the 9th POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2009.08.31   Language:English  

  • An Obstacle Detection Using Improved Moving-edge Detection and TTC-based Edge Grouping,

    Proc. of the 9th POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2009.08.25   Language:Japanese  

  • 物体エッジの動き検出および衝突時間ベースのエッジ統合を用いた障害物検出

    梁海超

    第15回画像センシングシンポジウム(SII09) 

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    Event date: 2009.06.11   Language:Japanese  

  • 画像の不完全エッジを補完する主観的輪郭生成のためのAD融合回路方式画素並列型異方性拡散LSI,

    LSIとシステムのワークショップ, ポスターセッション #29, 講演資料集およびポスター資料集 

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    Event date: 2009.05.19   Language:Japanese  

  • スパイク駆動方式ガボールフィルタ回路モデル

    日本神経回路学会 第19回全国大会(JNNS2009) 

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    Event date: 2009.04   Language:Japanese  

  • 画素並列型異方性拡散LSIを用いたリアルタイム画像処理システムによる主観的輪郭生成,

    日本神経回路学会 第19回全国大会(JNNS2009), 

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    Event date: 2009.04   Language:Japanese  

  • バイオテンプレート極限加工による2次元量子ナノディスクアレイの作製と電気特性,

    第56回応用物理学関係連合講演会, 講演番号 31a-F-10, 講演予稿集 

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    Event date: 2009.03.31   Language:Japanese  

  • ガボール特徴量を用いた相関法による高速・高精度ステレオマッチング法,

    電子情報通信学会 総合大会, 講演番号D-12-65, 情報・システム講演論文集2 

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    Event date: 2009.03.17   Language:Japanese  

  • 時空間ガボールフィルタによる土砂災害前兆現象検知におけるフレームレートの影響評価,

    電子情報通信学会 総合大会, 講演番号D-12-2, 情報・システム講演論文集2 

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    Event date: 2009.03.17   Language:Japanese  

  • A CMOS Pixel-parallel Directional-Diffusion LSI for Subjective Contour Generation Using a Merged Analog-Digital Approach,

    Proc. of East-Asia Inter-University Workshop on Brain Engineering 2009 (EAW'09) 

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    Event date: 2009.03.10   Language:English  

  • 災害監視における映像情報の活用―土砂災害の前兆現象検知の検討―,

    日本災害情報学会 第10回研究発表大会予稿集 

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    Event date: 2008.10.26   Language:Japanese  

  • Brain-inspired visual processing toward intelligent automobile applications

    2nd Fraunhofer IAIS-Kyutech Joint Workshop (Knowledge Cluster Initiative (The 2nd Stage), Expansion Program)  

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    Event date: 2008.10.10   Language:English  

  • A CMOS Element Circuit Phase-locked Loop Neural Networks with Pulse-modulation Technique,

    D. Atuti

    Proc. of the 8th POSTECH-KYUTECH Joint Workshop on Neuroinformatics,  

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    Event date: 2008.08.26   Language:English  

  • A Pixel-parallel Anisotropic Diffusion Algorithm for Subjective Contour Generation

    Proc. of the 8th POSTECH-KYUTECH Joint Workshop on Neuroinformatics, 

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    Event date: 2008.08.26   Language:English  

  • 1D畳み込み演算による2DイメージマッチングプロセッサLSI の構成法

    電子情報通信学会 機能集積情報システム研究会, FIIS-08-238 

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    Event date: 2008.06.27   Language:Japanese  

  • 時空間ガボールフィルタによる土砂災害前兆現象検知におけるフレームレートの影響評価

    電子情報通信学会 総合大会,  

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    Event date: 2008.04   Language:Japanese  

  • バイオテンプレート極限加工による2次元量子ナノディスクアレイの作製と電気特性,

    第56回応用物理学関係連合講演会 

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    Event date: 2008.04   Language:Japanese  

  • A Motion Detection Model Inspired by CA3-CA2-CA1 Network in the Hippocampus and Its FPGA Implementation,

    Proc. of East-Asia Inter-University Workshop on Brain Engineering (EAW2010), p. 205, Daegu, Korea, March 3-5, 2010.  

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    Event date: 2008.04   Language:Japanese  

  • AD融合方式ガボールフィルタLSIを用いた顔・物体認識システム

    電子情報通信学会総合大会, 講演番号TK-2-3 

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    Event date: 2008.03.21   Language:Japanese  

  • AD融合方式ガボールフィルタLSIを用いた顔・物体認識システム

    本人

    電子情報通信学会総合大会, 講演番号TK-2-3, 

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    Event date: 2008.03.21   Language:Japanese  

  • 実時間顔・腕姿勢認識システムと影消去技術

    電子情報通信学会 総合大会, 講演番号TK-3-6 

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    Event date: 2008.03.19   Language:Japanese  

  • 海馬の機能にヒントを得た接近物体検知システム

    電子情報通信学会 総合大会 講演番号TK-3-5 

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    Event date: 2008.03.19   Language:Japanese  

  • Real-time Face Authentication and Arm Posture Recognition Using Elastic Graph Matching and Arm Model Fitting

    Demonstration session of 4th Int. Conf. on Brain-Inspired Information Technology (BrainIT2007) 

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    Event date: 2007.11.15   Language:English  

  • Shadow Elimination Mimicking the Human Visual System

    Demonstration session of 4th Int. Conf. on Brain-Inspired Information Technology (BrainIT2007) 

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    Event date: 2007.11.15   Language:English  

  • An FPGA-based Collision Warning System Using Moving-Object Detection Inspired by Neuronal Propagation in the Hippocampus

    Demonstration session of 4th Int. Conf. on Brain-Inspired Information Technology (BrainIT2007) 

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    Event date: 2007.11.15   Language:English  

  • A CMOS Spiking Neural Network Circuit with STDP Function

    Proc. of the 7th POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2007.09.27   Language:English  

  • Face and Gesture Recognition Using Graph-Matching and Arm Model Fitting

    Proc. of the 7th POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2007.08.27   Language:English  

  • A Shadow Elimination Algorithm Mimicking the Human Visual System

    Proc. of the 7th POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2007.08.27   Language:English  

  • 大局的画像領域分割・抽出を行うアナログ・デジタル融合方式画素並列型LSIの設計

    第10回システムLSIワークショップ 

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    Event date: 2006.11.28   Language:Japanese  

  • A Pulse-Modulation Circuit for Nonlinear Systems with Self Regulatory Threshold Dynamics

    Int. Workshop on Synchronization: Phenomena and Analyses 

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    Event date: 2006.10.04   Language:English  

  • Design of a CMOS Circuit for STDP with a Symmetric Time Window

    Int. Workshop on Synchronization: Phenomena and Analyses 

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    Event date: 2006.10.04   Language:English  

  • パルス変調方式による位相振動子結合系のCMOS回路実現

    日本神経回路学会 第16回全国大会(JNNS2006) 

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    Event date: 2006.09.21   Language:Japanese  

  • STDP を導入したCMOS シナプス回路と連想メモリへの応用

    日本神経回路学会 第16回全国大会(JNNS2006) 

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    Event date: 2006.09.19   Language:Japanese  

  • 海馬時系列符号化モデルに基づく移動体検出手法のデジタルLSIアーキテクチャ

    情報科学技術フォーラム (FIT 2006) 

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    Event date: 2006.09.05   Language:Japanese  

  • A CMOS Pulse-Modulation Circuit Technique for Nonlinear Dynamical Systems Using Phase Variables

    Proc. of the 6th POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2006.08.29   Language:English  

  • A CMOS Circuit for Spike-Timing Dependent Synaptic Plasticity with a Symmetric Time Window

    Proc. of the 6th POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2006.08.29   Language:English  

  • AD融合/混載アーキテクチャによる画像フィルタリングプロセッサと顔位置検出への応用

    第9回システムLSIワークショップ 

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    Event date: 2005.11.29   Language:Japanese  

  • An Analog CMOS Circuit for Spiking Neuron Models

    Int. Symp. on Complexity Modelling and its Applications Poster Session 

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    Event date: 2005.11.22   Language:English  

  • 1-D Arbitrary Chaos Generator Circuits Using Pulse Modulation Approaches

    Int. Symp. on Complexity Modelling and its Applications Poster Session  

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    Event date: 2005.11.22   Language:English  

  • A Face/Object Recognition System Using FPGA Implementation of Elastic Graph Matching

    Proc. of the 5th POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2005.10.24   Language:English  

  • 初期視覚野機能を実現するガボールフィルタLSI を用いたリアルタイム画像処理システム

    日本神経回路学会 第15回全国大会(JNNS2005) 

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    Event date: 2005.09.22   Language:Japanese  

  • コンボリューショナル・ニューラルネットワークのためのLSIアーキテクチャとアナログ積和演算回路

    電気学会 電子・情報・システム部門大会 

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    Event date: 2005.09.07   Language:Japanese  

  • スパイキングホップフィールドネットワークのためのアナログCMOS回路

    電気学会 電子・情報・システム部門大会 

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    Event date: 2005.09.07   Language:Japanese  

  • An Image Filtering Processor VLSI and Its Application to Face Position Detection

    Proc. of the 5th POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2005.08.24   Language:English  

  • Elastic Graph MatchingのためのディジタルイメージプロセッサLSIのアーキテクチャ

    第8回システムLSIワークショップ 

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    Event date: 2004.11   Language:Japanese  

  • リアルタイム画像認識のためのAD融合方式画素並列型ガボールフィルタLSI

    本人

    第8回システムLSIワークショップ 

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    Event date: 2004.11   Language:Japanese  

  • しきい値制御型スパイキングフィードバックネットワークとそのLSI実現

    電気学会 電子・情報・システム部門大会 

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    Event date: 2004.09   Language:Japanese  

  • 主観的輪郭生成のためのセルオートマトン型拡散アルゴリズム

    電気関係学会九州支部連合大会 

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    Event date: 2004.09   Language:Japanese  

  • Pixel-Parallel Gabor-Filter LSI Based on Merged Analog/Digital Architecture

    Proceedings of the 4th POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2004.08   Language:English  

  • A VLSI Architecture for Elastic Graph Matching

    Proceedings of the 4th POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2004.08   Language:English  

  • A Convolutional Neural Network VLSI for Image Recognition Using Merged/Mixed Analog-Digital Architecture

    Proceedings of the 4th POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2004.08   Language:English  

  • Elastic Graph MatchingのためのディジタルイメージプロセッサLSIのアーキテクチャ

    第17回 回路とシステム軽井沢ワークショップ 

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    Event date: 2004.04   Language:Japanese  

  • 物体同士の重なりにより分断された画像領域を同時抽出する非線形振動子ネットワーク

    第5回 日本知能情報ファジィ学会九州支部学術講演会予稿集 

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    Event date: 2003.12   Language:Japanese  

  • Nonlinear oscillator network LSIs for image region segmentation

    Proc. of the Third POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2003.04   Language:English  

  • Image segmentation based on a nonlinear oscillator network for perceptual organization in computer vision

    Proc. of the Third POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2003.04   Language:English  

  • 確率的連想によるクラスタリングアルゴリズムのVLSI実現

    電子情報通信学会総合大会 

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    Event date: 2003.03.21   Language:Japanese  

  • 大局的画像領域分割のためのデジタル方式抵抗ヒューズネットワークの設計とFPGAへの実装

    第6回システムLSIワークショップ講演資料集およびポスター資料集 

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    Event date: 2002.11.25 - 2002.11.27   Language:Japanese  

  • アナログ・デジタル融合アーキテクチャによるConvolutional Network LSIの設計

    日本神経回路学会第12回全国大会講演論文概要集 

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    Event date: 2002.09.19 - 2002.09.21   Language:Japanese  

  • A Biologically-Inspired Object Recognition System toward Pixel-Parallel VLSI Implemetation

    Proc. of the Second POSTECH-KYUTECH Joint Workshop on Neuroinformatics 

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    Event date: 2002.08.23   Language:English  

  • セルラーニューラルネットワーク方式ガボール型フィルタ回路の簡略化ダイナミクスの提案

    電子情報通信学会総合大会 

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    Event date: 2002.04   Language:Japanese  

  • A Biologically-Inspired Object Recognition System Using Pixel-Parallel Feature Extraction VLSIs

    International Invitational Workshop on Intelligent Interface Devices 

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    Event date: 2002.04   Language:English  

  • A New PWM Technique Implementing Arbitrary Nonlinear Dynamics and its Application to Oscillator Neurons

    Proceedings The 2nd R. I. E. C. International Symposium (DAIPS) 

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    Event date: 1998.04   Language:English  

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Industrial Property

  • 路面状態検出装置及び方法

    森江隆,田中秀樹,鎌田卓治,田中宙夫,松岡悟,是治久,久米孝則,山本康典

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    Application no:'特願2010-038593  Date applied:2010.02.24

    Patent/Registration no:特許第5457224号  Date registered:2014.01.17 

  • 情報処理装置及びプログラム

    森江隆,田中秀樹,大久保悟,松坂建治

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    Application no:'特願2009-210093  Date applied:2009.09.11

    Patent/Registration no:特許5435594  Date registered:2013.12.20 

  • 関数演算器

    森江隆,是角圭祐

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    Application no:特願2006-063529  Date applied:2006.03.09

    Patent/Registration no:特許第4625961号  Date registered:2010.11.19 

  • 信号処理装置及び信号処理方法

    梅澤淳,森江隆,岩田穆

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    Application no:'特願2003-065568  Date applied:2003.10.16

    Patent/Registration no:特許4318936  Date registered:2009.06.05 

Lectures

  • 不揮発性メモリを用いたAIプロセッサ/ニューロモルフィック回路技術の進展と今後の展望

    第48回 薄膜・表面物理セミナー  2020.12  応用物理学会 薄膜・表面物理分科会

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    Language:Japanese   Presentation type:Invited lecture  

  • 海馬の機能にヒントを得た脳型ハードウェアアーキテクチャ

    第30回日本神経回路学会全国大会 (JNNS2020)  2020.12 

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    Language:Japanese   Presentation type:Invited lecture  

  • 3端子アナログメモリ素子としてのFeFETの適用を目指した人工知能ハードウェアモデルと回路アーキテクチャ

    第80回応用物理学会 秋季学術講演会  2019.09  応用物理学会

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    Language:Japanese   Presentation type:Invited lecture  

  • 次世代人工知能のための脳型集積回路技術とデバイス技術

    第83回半導体・集積回路技術シンポジウム  2019.08  電気化学会 電子材料委員会

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    Language:Japanese   Presentation type:Invited lecture  

  • 次世代AIのための脳型記憶処理モデルと新デバイス技術への期待

    第66回応用物理学会 春季学術講演会  2019.03  応用物理学会

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    Presentation type:Special lecture  

  • 次世代AIのための脳型計算モデル・集積回路・デバイス

    新世代コンピューティングシンポジウム/第8回電子光技術シンポジウム  2019.01  産総研

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    Presentation type:Invited lecture  

  • 次世代AIのための脳型処理モデル・デバイス開発の現状と分子ナノテクノロジーへの期待

    日本学術振興会 産学協力研究委員会 分子ナノテクノロジー第174委員会 第64回研究会  2018.11 

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    Presentation type:Invited lecture  

  • 時間領域アナログ演算に基づく脳型処理モデルとデバイス開発の現状と展望

    日本学術振興会 産学協力研究委員会 薄膜第131委員会 並びに 半導体界面制御技術第154委員会 合同研究会  2018.10 

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    Presentation type:Invited lecture  

  • 脳型情報処理のための時間領域アナログ演算方式回路とアナログメモリデバイス

    JEITA 先端電子材料・デバイス技術フォーラム  2018.07 

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    Presentation type:Invited lecture  

  • 家庭用サービスロボットへの適用に向けた脳型知能集積回路の開発

    電子情報通信学会 第31回回路とシステムワークショップ  2018.05 

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    Presentation type:Invited lecture  

  • 深層学習ハードウェアのためのカオスボルツマンマシンのVLSI実装

    電子情報通信学会 集積回路研究会  2018.04 

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    Presentation type:Invited lecture  

  • ニューロモルフィックハードウェアのためのFeFETアナログメモリ

    第65回応用物理学会 春季学術講演会  2018.03 

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    Presentation type:Invited lecture  

  • 脳型人工知能ハードウェア開発の現状と課題

    Electron Devices Technology and Manufacturing (EDTM) Conference, 日本語チュートリアル  2018.03 

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    Presentation type:Invited lecture  

  • 脳型アナログ集積回路開発の経緯と展望

    第23回電子デバイス界面テクノロジー研究会  2018.01 

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    Presentation type:Invited lecture  

  • 脳型人工知能ハードウェアの物理モデルと実装課題

    分子アークテクトニクス研究会  2017.12 

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    Presentation type:Invited lecture  

  • Analog Memory Devices and Circuits for Future Brain-like AI Processors

    2017 Int. Workshop on Dielectric Thin Films for Future EleDevices: Science and Technology (IWDTF 2017)ctron   2017.11 

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    Presentation type:Invited lecture  

  • Approach to accelerate the development of practical home service robots - RoboCup@Home DSPL -

    26th IEEE Int. Symp. on Robot and Human Interactive Communication (RO-MAN 2017)  2017.09 

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    Presentation type:Invited lecture  

  • 脳型人工知能のためのアナログVLSIの回路とデバイス

    日本学術振興会シリコン超集積化システム第165委員会, VLSI夏の学校関西  2017.08 

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    Presentation type:Invited lecture  

  • Time-domain Analog Computing and VLSI Systems toward Ultimately High-efficient Brain-like Hardware

    Workshop on Brain-inspired Hardware  2017.03  産業技術総合研究所

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    Presentation type:Invited lecture  

  • 時間領域アナログ方式で脳の演算効率に迫る

    第18回 全脳アーキテクチャ勉強会  2017.03 

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    Presentation type:Invited lecture  

  • 超低エネルギー時間軸脳型システム構築に向けた分子バイオ素子研究への期待

    応用物理学会 有機分子・バイオエレクトロニクス分科会  2017.02 

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    Presentation type:Invited lecture  

  • Analog VLSI Circuits and Devices for Neuro-Inspired Time-Domain Computing

    Int. Conf. on Solid State Devices and Materials (SSDM 2016)  2016.09 

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    Presentation type:Invited lecture  

  • 脳型チップのための時間軸アナログ非線形演算回路とデバイス

    電子情報通信学会 ソサイエティ大会  2016.09 

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    Presentation type:Panel discussion  

  • 生体の神経系と共生する電子デバイスと集積回路方式

    第77回応用物理学会 秋季学術講演会  2016.09 

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    Presentation type:Invited lecture  

  • 脳型人工知能のためのアナログVLSIの回路とデバイス

    日本学術振興会シリコン超集積化システム第165委員会, VLSI夏の学校  2016.08 

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    Presentation type:Invited lecture  

  • Hibikino-Musashi@Homeチームにおけるロボット開発

    第4回インテリジェントホームロボティクス研究会  2016.05 

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    Presentation type:Invited lecture  

  • 脳型人工知能のためのアナログ集積回路とナノデバイス

    第10回集積化MEMS技術研究会  2016.05 

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    Presentation type:Invited lecture   Venue:東京  

  • VLSI Pulse-Coupled Phase Oscillator Networks toward Spike-based Computation

    9th EAI Int. Conf. on Bio-inspired Information and Communications Technologies (BICT)  2015.12  The Second Int. Workshop on Brain-Inspired Information Communication Technologies (BIICT)

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    Presentation type:Invited lecture  

  • VLSI Pulse-Coupled Phase Oscillator Networks and Their Emulator toward Spike-based Computation for Intelligent Processing

    Int. Conf. on Solid State Devices and Materials (SSDM 2015)  2015.09  The Japan Society of Applied Physics

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    Presentation type:Invited lecture  

  • スパイクベース脳型計算のための集積回路とナノデバイス

    シリコン超集積化システム第165委員会 7月研究会資料  2015.07  日本学術振興会

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    Presentation type:Invited lecture   Venue:東京大学(東京)  

  • CMOS Circuits and Nanodevices for Spike Based Neural Computing

    IEEE Int. Meeting for Future of Electron Devices, Kansai  2015.06 

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    Presentation type:Invited lecture  

  • 脳型集積回路の開発動向とナノデバイス・材料面からのブレークスルーの期待

    第37回アナログRF研究会  2014.12  電子情報通信学会 集積回路研究専門委員会

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    Presentation type:Invited lecture   Venue:京都  

  • ノイズを利用した脳型情報処理とナノ構造

    日本化学会 第94回春季年会  2014.03  日本化学会

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    Presentation type:Invited lecture   Venue:名古屋  

  • VLSI Implementation and Nanostructure for Time-domain Spike-based Computing

    The 1st Int. Symp. on Neuromorphic and Nonlinear Engineering (ISNNE 2014)  2014.02 

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    Presentation type:Invited lecture  

  • VLSI Implementation and Nanostructure for Time-domain Spike-based Computing

    The 1st Int. Symp. on Neuromorphic and Nonlinear Engineering (ISNNE 2014)  2014.02 

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    Event date: 2014.02.20 - 2014.02.21   Language:English   Presentation type:Special lecture  

  • A Silicon Nanodisk Array Structure Realizing Synaptic Response of Spiking Neuron Models with Noise

    The 19th Asia and South Pacific Design Automation Conference (ASP-DAC 2014)  2014.01  IEEE

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    Presentation type:Invited lecture  

  • Coupled MRF Models for Coarse Image Region Segmentation and Their VLSI Implementation

    Int. Workshop on Machine Vision for Industrial Innovation (MVII2013)  2013.10 

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    Presentation type:Invited lecture  

  • 知的センシグデバイスデバイスのための脳型処理モデルを実現するアナログ・ディジタル融合LSI,

    電気学会 センサ・マイクロマシン部門大会, 第29回「センサ・マイクロマシンと応用システム」シンポジウム  2012.10 

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    Presentation type:Invited lecture  

  • An Efficient Clustering Algorithm Using Stochastic Association and Its Implementation Using 3D-Nanodot-Array Structures

    2003 RCIQE International Seminar on "Quantum Nanoelectronics for Meme-Media-Based Information Technologies  2003.04 

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    Event date: 2003.04   Language:English   Presentation type:Special lecture  

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Honors and Awards

  • Int. Joint Conf. on Neural Networks (IJCNN 2019), Best Paper Award

    IEEE   Reservoir Computing Based on Dynamics of Pseudo-Billiard System in Hypercube   2019.07.17

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    Country:United States

  • Int. Symp. on Circuits and Systems (ISCAS 2019), Best Live Demonstration Award

    2019.05.27

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    Country:United States

  • IEEE SSCS Japan Chapter Academic Research Award

    2019.05.13

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    Country:Japan

  • 20th Int. Conf. on Neural Information Processing (ICONIP2013), Best Paper Award

    2013.11.05

    Y. Suedomi, H. Tamukoh, M. Tanaka, K. Matsuzaka, T. Morie

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    Country:Korea, Republic of

  • 第3回 ユニーク・自作チップ・コンテスト in ひびきの, 最優秀賞

    財団法人北九州産業学術推進機構   2012.02.10

    東原 敬, 西 広海, 松坂 建治, 森江 隆

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    Country:Japan

  • ICD優秀ポスター賞

    LSIとシステムのワークショップ2009   2009.05.19

    金永宰,財津賢一郎,森江隆

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    Country:Japan

  • The 9th LSI IP Design Award, Grant

    2007.04.26

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    Country:Japan

  • SISA Excellent Student Paper Awards

    2016.09.15

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    Country:Malaysia

  • Best Paper Award finalist

    2012 Int. Conf. on Connected Vehicles & Expo   2012.12.16

    S. Qian, J. K. Tan, H. Kim, S. Ishikawa, and T. Morie

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    Country:China

  • Best Presentation Award

    12th POSTECH-KYUTECH Joint Workshop on Neuroinformatics   2012.08.21

    H. Liang, T. Morie, M. Igarashi, and S. Samukawa

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    Country:Japan

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Grants-in-Aid for Scientific Research

  • 超並列アナログ脳型LSIに向けたナノ構造メモリ素子とその集積回路化の研究

    Grant number:15H01706  2015.04 - 2019.03   基盤研究(A)

  • 構造的脳型情報処理システムのためのスパイク駆動型位相振動子集積回路の開発

    Grant number:23650118  2011.04 - 2013.03   挑戦的萌芽研究

  • シリコンナノディスクアレイ構造を用いた知能情報処理デバイス・回路の開発

    Grant number:22240022  2010.04 - 2014.03   基盤研究(A)

  • リアルタイム高次統合視覚集積システムの開発とマーカレス身振り認識への応用

    Grant number:19300079  2007.05 - 2010.03   基盤研究(B)

  • 大局的分割画像領域の結合により情景理解を実現する高次認識集積システムの研究

    Grant number:15300063  2003.05 - 2006.03   基盤研究(B)

Contracts

  • 未来共生社会にむけたニューロモルフィックダイナミク スのポテンシャルの解明

    2018.09 - 2023.02

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    Grant type:Consigned research

  • 時間領域脳型人工知能システムの基盤技術開発

    2017.08 - 2020.01

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    Grant type:Consigned research

Award for Educational Activities

  • 電気学会 2019年電子・情報・システム部門技術委員会奨励賞

    電気学会   2020.09.01

  • IEEE福岡支部 学生研究奨励賞

    IEEE福岡支部   2020.02.25

  • Best Live Demonstration Award

    IEEE ISCAS2019   2019.05.28

  • IEEE SSCS Japan Chapter Academic Research Award

    LSIとシステムのワークショップ   2019.05.14

Activities of Academic societies and Committees

  • 応用物理学会   シリコンテクノロジー分科会 シリコンナノテクノロジー研究委員会 幹事  

    2013.01

  • 北九州市 カーエレクトロニクス事業運営委員会   運営委員  

    2007.09 - 2022.03

  • 日本神経回路学会   理事  

    2010.04 - 2014.03

  • IEEE   Japan Council Student Activities Committee (SAC) Chair  

    2009.01 - 2010.12

  • 北九州産業学術推進機構 ひびきのAI社会実装研究会   委員  

    2016.06