MORIE Takashi

写真a

Title

Professor

Laboratory

2-4 Hibikino, Wakamatsu-ku, Kitakyushu-shi, Fukuoka

Research Fields, Keywords

Image processing, Brain-like vision systems, Integrated Circuits, Nanodevices, Neurocomputers, Brain-Computers

Phone

+81-93-695-6122

Fax

+81-93-695-6014

Undergraduate Education 【 display / non-display

  • 1979.03   Osaka University   Faculty of Science   Physics   Graduated   JAPAN

Post Graduate Education 【 display / non-display

  • 1981.03  Osaka University  Graduate School, Division of Natural Science  Physics  Master's Course  Completed  JAPAN

Degree 【 display / non-display

  • Hokkaido University -  Doctor of Engineering  1996.09

Biography in Kyutech 【 display / non-display

  • 2014.04
    -
    Now

    Kyushu Institute of TechnologyGraduate School of Life Science and Systems Engineering   Department of Human Intelligence Systems   Professor  

  • 2002.04
    -
    2014.03

    Kyushu Institute of TechnologyGraduate School of Life Science and Systems Engineering   Department of Brain Science and Engineering   Professor  

Biography before Kyutech 【 display / non-display

  • 2001.04
    -
    2002.03

    Graduate school of Advanced sciences of Matter, Hiroshima University   Associate Professor (as old post name)   JAPAN

  • 1997.04
    -
    2001.03

    Faculty of Engineering, Hiroshima University   Associate Professor (as old post name)   JAPAN

  • 1981.04
    -
    1997.03

    NTT Laboratories   Research staff   JAPAN

Academic Society Memberships 【 display / non-display

  • 2004.04
    -
    Now
     

    IEEE  UNITED STATES

  • 1990.05
    -
    Now
     

    The institue of electronics, information and communication engineers (IEICE)  JAPAN

 

Publications (Article) 【 display / non-display

  • A Chaotic Boltzmann Machine Working as a Reservoir and Its Analog VLSI Implementation

    Yamaguchi M., Katori Y., Kamimura D., Tamukoh H., Morie T.

    Proceedings of the International Joint Conference on Neural Networks    2019-July   2019.07  [Refereed]

     View Summary

    © 2019 IEEE. Reservoir computing is attracting great interest because of its high computing ability especially for time-series prediction, despite its simple structure and learning scheme. This paper proposes a reservoir computing hardware model using a chaotic Boltzmann machine (CBM) as the reservoir, which can achieve complex motion in a dynamical system on a high-dimensional hypercube. The CBM uses analog nonlinear dynamics, unlike the stochastic operation of the original Boltzmann machine model. To utilize CBMs as a reservoir, chaotic operation must be suppressed, and the echo state property should be satisfied. We modify the CBM model for simpler analog complementary metal-oxide-semiconductor very-large-scale integration (CMOS VLSI) implementation, and propose its use as a reservoir by adding an external reference clock signal. We then verify its proper operation by numerical simulation. We also refine the CMOS VLSI circuit design based on the proposed modified CBM model to improve power consumption and calculation precision.

    DOI Scopus

  • Reservoir Computing Based on Dynamics of Pseudo-Billiard System in Hypercube

    Katori Y., Tamukoh H., Morie T.

    Proceedings of the International Joint Conference on Neural Networks    2019-July   2019.07  [Refereed]

     View Summary

    © 2019 IEEE. Reservoir computing (RC) is a framework for constructing recurrent neural networks with simple training rule and sparsely and randomly connected nonlinear units. The network (called reservoir) generates complex motion that can be used for many tasks including time series generation and prediction. We construct a reservoir based on the dynamics of the pseudo-billiard system that produce complex motion in a high-dimensional hypercube. In particular, we use the chaotic Boltzmann machine (CBM) whose units exhibit chaotic behavior in the hypercube. The units interact with each other in a time-domain manner through its binary state, and thus an efficient hardware implementation of the system is expected. In order to utilize the CBM as the reservoir, it is necessary to control its chaotic behavior for ensuring the echo state property of RC and establish encoding and decoding for input and output signal. For this purpose, we introduce a reference clock and analyze effects and properties of the reference input. We evaluate the proposed model on the time series generation tasks and show that the model works properly on a broad range of parameter values. Our approach presents a novel mechanism for time-domain information processing and a fundamental technology for a brain like artificial intelligence system.

    DOI Scopus

  • Live demonstration: A VLSI implementation of time-domain analog weighted-sum calculation model for intelligent processing on robots

    Yamaguchi M., Iwamoto G., Abe Y., Tanaka Y., Ishida Y., Tamukoh H., Morie T.

      2019-May   2019.05  [Refereed]

     View Summary

    © 2019 IEEE This live demonstration presents a VLSI chip based on “Time-domain Analog Computing with Transient states (TACT)” approach for intelligent processing on robots. This TACT chip, fabricated using 250-nm CMOS technology, implements a time-domain analog weighted-sum calculation model with very high energy efficiency. We integrate the TACT chip into a robot via Robot Operating System (ROS) interfaces. A human tracking robot demonstration is performed by the TACT chip with energy efficiency of 300 TOPS/W.

    DOI Scopus

  • An Energy-efficient Time-domain Analog VLSI Neural Network Processor Based on a Pulse-width Modulation Approach

    M. Yamaguchi, G. Iwamoto, H. Tamukoh, T. Morie

    arXiv.org      1810.06819   2019.02

  • A Time-domain Analog Weighted-sum Calculation Model for Extremely Low Power VLSI Implementation of Multi-layer Neural Networks

    Q. Wang, H. Tamukoh, T. Morie

    arXiv.org      1810.06819   2018.10

display all >>

Publications (Books) 【 display / non-display

  • Learning on Silicon

    T. Morie ( Single Work )

    Kluwer Academic Publishers  1999.04

  • Shadow Elimination Mimicking the Human Visual System

    T. Kamada,A. Hanazawa,T. Morie ( Joint Work )

    Brain-Inspired Information Technology (Studies in Computational Intelligence)  2009.11

  • An FPGA-Based Collision Warning System Using Moving-Object Detection Inspired by Neuronal Propagation in the Hippocampus

    H. Liang,Y. Suzuki,T. Morie,K. Nakada,T. Miki,H. Hayashi ( Joint Work )

    Brain-Inspired Information Technology (Studies in Computational Intelligence)  2009.11

  • Real-Time Human-Machine Interaction System Based on Face Authentication and Arm Posture Recognition

    I. R. Khan,T. Morie,H. Miyamoto,Y. Kuriya,M. Shimizu ( Joint Work )

    Brain-Inspired Information Technology (Studies in Computational Intelligence),   2009.11

Conference Prsentations (Oral, Poster) 【 display / non-display

  • 家庭用サービスロボットのための海馬-嗅内皮質モデルにおける場のオブジェクト表現と統合

    前田 優輔, 立野 勝巳, 森江 隆

    電子情報通信学会 NC研究会  2020.01  -  2020.01 

  • CMOSカオスボルツマンマシン回路のリザバー計算への応用

    上村 大地, 山口 正登志, 香取 勇一, 田向 権, 森江 隆

    電気学会 電子回路研究会  2019.12  -  2019.12 

  • FeFETを用いた時間領域アナログ積和演算回路の性能評価

    原田 將敬, 森江 隆, 高橋 光恵, 酒井 滋樹

    第80回応用物理学会 秋季学術講演会  2019.09  -  2019.09 

  • 海馬・扁桃体・前頭前野の機能を統合した脳型人工知能モデル

    田中 悠一朗, 田向 権, 立野 勝巳, 香取 勇一, 森江 隆

    第29回 日本神経回路学会 全国大会(JNNS 2019)  2019.09  -  2019.09 

  • 時間領域アナログ積和演算方式を用いた演算効率300TOPS/W人工知能向けCMOSバイナリコネクトネットワーク回路

    山口 正登志, 岩元 剛毅, 田向 権, 森江 隆

    LSIとシステムのワークショップ  2019.05  -  2019.05 

display all >>

Lectures 【 display / non-display

  • 3端子アナログメモリ素子としてのFeFETの適用を目指した人工知能ハードウェアモデルと回路アーキテクチャ

    第80回応用物理学会 秋季学術講演会   2019.09.20  応用物理学会

  • 次世代人工知能のための脳型集積回路技術とデバイス技術

    第83回半導体・集積回路技術シンポジウム   2019.08.29  電気化学会 電子材料委員会

  • 次世代AIのための脳型記憶処理モデルと新デバイス技術への期待

    第66回応用物理学会 春季学術講演会   2019.03.11  応用物理学会

  • 次世代AIのための脳型計算モデル・集積回路・デバイス

    新世代コンピューティングシンポジウム/第8回電子光技術シンポジウム   2019.01.25  産総研

  • 次世代AIのための脳型処理モデル・デバイス開発の現状と分子ナノテクノロジーへの期待

    日本学術振興会 産学協力研究委員会 分子ナノテクノロジー第174委員会 第64回研究会   2018.11.15 

display all >>

Honors and Awards 【 display / non-display

  • Int. Joint Conf. on Neural Networks (IJCNN 2019), Best Paper Award

    2019.07.17     UNITED STATES

  • Int. Symp. on Circuits and Systems (ISCAS 2019), Best Live Demonstration Award

    2019.05.27     UNITED STATES

  • IEEE SSCS Japan Chapter Academic Research Award

    2019.05.13     JAPAN

  • 20th Int. Conf. on Neural Information Processing (ICONIP2013), Best Paper Award

    2013.11.05     KOREA REPUBLIC OF

    Winner: Y. Suedomi, H. Tamukoh, M. Tanaka, K. Matsuzaka, T. Morie

  • The 9th LSI IP Design Award, Grant

    2007.04.26     JAPAN

display all >>

 

Activities of Academic societies and Committees 【 display / non-display

  • 2009.01
    -
    2010.12

    IEEE   Japan Council Student Activities Committee (SAC) Chair