MATSUMOTO Satoshi

写真a

Title

Professor

Laboratory

1-1 Sensui-cho, Tobata-ku, Kitakyushu-shi, Fukuoka

Research Fields, Keywords

Degree 【 display / non-display

  • Waseda University -  Doctor of Engineering  1996.12

Biography in Kyutech 【 display / non-display

  • 2016.04
    -
    2017.03

    Kyushu Institute of TechnologySchool of Engineering  

  • 2016.04
    -
    2017.03

    Kyushu Institute of TechnologyFaculty of Engineering  

  • 2010.04
    -
    Now

    Kyushu Institute of TechnologyFaculty of Engineering   Department of Electrical Engineering and Electronics   Professor  

 

Publications (Article) 【 display / non-display

  • Impact of the passive component structure for high efficiency and fast response POL using Power Supply on Chip

    K. Kajihara, S. Abe, S. Matsumoto

    Journal of the Institute of Industrial Applications Engineers  ( Institute of Industrial Applications Engineers )  8 ( 1 ) 1 - 7   2020.01  [Refereed]

    DOI

  • Si (100)-GaN/Si (111) low temperature wafer bonding process for 3D power supply on chip

    R. Ishito, K. Ono, S. Matsumoto

    IEEE CPMT Symposium Japan 2019 (ICSJ2019)  ( IEEE )  ECR Session12   2019.11  [Refereed]

    Japan  Kyoto  2019.11  -  2019.11

  • Transformer-less floating gate driver for 3D power SoC

    M. Nakayama, S. Abe, S.Matsumoto

    2019 International 3D Systems Integration Conference (3DIC)  ( IEEE )  B4P-C 4055   2019.10  [Refereed]

    Japan  Sendai  2019.10  -  2019.10

  • Novel Software Defined Power Supply Utilizing Power Supply on Chip -Power supply which outputs the regulated output voltage by only connecting the load-

    T. Oka, S. Abe, S. Matsumoto

    21th European Conference on Power Electronics and Applications (EPE 2019, ECCE Europe)     DS2f 112   2019.09  [Refereed]

    Italy  Gen0va  2019.09  -  2019.09

  • Novel Fully Digital-controlled point of load converter based on H-bride DC-DC converter

    T. Oka, S. Nakano, S. Abe, S. Matsumoto

    IEEJ Journal of Industry Application  ( IEEJ )  8 ( 5 ) 813 - 819   2019.09  [Refereed]

    DOI

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Conference Prsentations (Oral, Poster) 【 display / non-display

  • A new control strategy of the on-chip POL based on parallel connections

    International Workshop on Power Supply On Chip  2012.11  -  2012.11 

  • Numerical predictions of a new SOI structure using thin-diamond film used as insulator

    nternational Workshop on Power Supply On Chip  2012.11  -  2012.11 

  • A high-efficiency 5-GHz-band power MOSFET fabricated by silicon-on-insulator technology

    2003 Japan-United State Joint Workshop on Space Solar Power System(JUSPS'03)  2003.04  -  2003.04