研究者詳細 - 松嶋　徹

論文 - 松嶋　徹

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Imbalance control by open stub for reduction of common-mode conversion at differential transmission line bend 査読有り

Matsushima T., Wada O.

IEEE International Symposium on Electromagnetic Compatibility 2014-December 125 - 128 2014年01月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

© 2014 The Institute of Electronics, Information and Communication Engineer. At a differential transmission line bend, a differential mode propagated in a differential transmission line is converted to a common mode due to asymmetry of the transmission line. The common mode conversion leads to problems with signal integrity. We propose a method to improve electric symmetry of the transmission line bend and thus reduce the common mode conversion. The self-capacitance and inductance of one line are different from those of another. In order to fit those parameters, the narrowing signal line for increasing self-inductance and placing a conductor shape which is like a stub are used to reduce the imbalance degree of the transmission line bend. We obtained a 20-dB reduction of common mode excitation by optimizing the signal line width and stub length. In addition, an equivalent circuit model for the transmission line bend is proposed to evaluate the reduction. The simulation results using the proposed equivalent circuit model are in good agreement with the results obtained by the 3D electromagnetic solver.

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Reduction of common-mode excitation on a differential transmission line bend by imbalance control 査読有り

Matsushima Tohlu, Wada Osami

IEICE Communications Express ( 一般社団法人電子情報通信学会 ) 3 ( 10 ) 295 - 299 2014年01月

担当区分：筆頭著者記述言語：英語掲載種別：研究論文（学術雑誌）

Asymmetry in a differential transmission line bend generates a large common mode, which leads to signal integrity issues. Herein two methods are proposed to improve the symmetry and reduce the common-mode at the line bend on a printed circuit board. Placing a guard trace near a narrowed inner signal line at the line bend results in a 15-dB reduction of the common mode. Alternatively, employing a stub connected to the inner signal at the bend section results in a more than 20-dB reduction.

DOI： 10.1587/comex.3.295

その他リンク： https://ci.nii.ac.jp/naid/130004698014

A method of common-mode reduction based on imbalance difference model for differential transmission line bend 査読有り

Matsushima T., Wada O.

IEEE International Symposium on Electromagnetic Compatibility 338 - 341 2013年12月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

A differential transmission line bend generates a large common mode due to its asymmetry, and it leads signal integrity problems. In this paper, the imbalance difference model, which was proposed by the authors for estimation of common-mode radiation, is extended to apply to the differential signaling systems. An equivalent circuit model based on the imbalance difference model is proposed for estimation of the common-mode excitation at the bent area. Simulation results of mode conversion from the differential mode to the common mode calculated by the proposed model are in good agreement with those using a three-dimensional electromagnetic solver. In order to reduce the common mode, a guard trace is added near the narrowed inner signal line at the bent area and it gives 15 dB of reduction of the common mode. © 2013 EMC Europe Foundation.

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屈曲差動線路におけるコモンモード発生抑制のための平衡度制御 (環境電磁工学) 査読有り

松嶋徹, 和田修己

電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 ( 一般社団法人電子情報通信学会 ) 113 ( 101 ) 5 - 10 2013年06月

記述言語：日本語掲載種別：研究論文（学術雑誌）

屈曲した差動伝送線路では、構造的な対称性の欠如によりコモンモードが発生し、信号品質の悪化を引き起こす。伝送線路におけるコモンモード発生について平衡度不整合理論を用いた説明がなされているが、本報告ではこの理論を拡張し、差動伝送線路の屈曲部におけるコモンモード変換を予測する等価回路モデルを提案した。提案する等価回路モデルでは、伝送線路の直線部は仮想的なモード伝送線路で表現し、屈曲部近傍は集中素子で表現する。それらの接続は理想変成器で行う。提案モデルを用いた回路計算により得たコモンモード発生量は、3次元電磁界解析により得られたコモンモード発生量と1dB以内の誤差で一致した。また、屈曲部の平衡度(電気的対称性)を向上させるために、ガードトレースを用いる方法とオープンスタブを配置する方法を検討し、それぞれ約15dBおよび約20dB程度のコモンモード発生抑制を実現した。

その他リンク： https://ci.nii.ac.jp/naid/110009779032

Impedance balance control for suppression of fluctuation on ground voltage in LSI package 査読有り

Maeda M., Matsushima T., Wada O.

EMC COMPO 2013 Proceedings - 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits 134 - 137 2013年01月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Simultaneous switching current of a CMOS circuit causes power and ground bounces. The voltage fluctuation is injected into the CMOS substrate, and it degrades the performance of the circuit operation. In this report, we focus on the fact that parasitic couplings in the CMOS substrate and parasitic inductance in the power and ground connection form a bridge circuit, and we demonstrate that the voltage bounce can be suppressed by controlling variable resistances that are inserted between the substrate resistive coupling and the conductor line for the DC supply. The effectiveness of this method is verified with a scaled quad flat package (QFP) and we reduced the measured voltage bounce about 40 dBμV. © 2013 IEEE.

DOI： 10.1109/EMCCompo.2013.6735187

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Substrate noise reduction based on impedance balance using tunable resistances 査読有り

Nakamura A., Maeda M., Matsushima T., Wada O.

EMC COMPO 2013 Proceedings - 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits 33 - 36 2013年01月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Substrate noise coupling from digital circuits causes degradation of performance of analog circuits on the same LSI chip. Generally large area on the chip is necessary to reduce the substrate coupling. In this paper, a proposed method eliminates the substrate coupling by extension of the impedance balance control technique which was proposed by the authors. The impedance balance condition on the LSI chip is satisfied by tunable resistances inserted into the substrate contacts. Even if the substrate coupling between two circuits is low (for example, 70 ω,) the substrate noise coupling was reduced enough on the condition of impedance balance. © 2013 IEEE.

DOI： 10.1109/EMCCompo.2013.6735168

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Improvement of reproducibility of DPI method to quantify RF conducted immunity of LDO regulator 査読有り

Matsushima T., Ikehara N., Hisakado T., Wada O.

EMC COMPO 2013 Proceedings - 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits 59 - 62 2013年01月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

In this paper, we discussed the reproducibility of the direct RF power injection method. Transmission and reflection characteristics of the measurement setup affected the evaluation of immunity. Also, the common-mode generation at the connection of the DC supply cable should be reduced using the common-mode absorption devices. © 2013 IEEE.

DOI： 10.1109/EMCCompo.2013.6735173

その他リンク： https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84897690026&origin=inward

Common-mode noise reduction using floating conductor in LSI package 査読有り

Matsushima T., Mabuchi Y., Hisakado T., Wada O.

2012 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2012 105 - 108 2012年12月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

The authors proposed a method to reduce the common-mode current flowing on a wire harness attached to a printed circuit board (PCB). In this method, SMD inductors are placed on a power supply line and/or a ground line on a PCB to control balance of impedance of the power distribution network, and the common-mode current can be reduced. In this paper, the authors apply this reduction method to an LSI package, and propose a new structure of the LSI package with floating conductor which is called cover metal. The common-mode voltage is reduced about 20 dB with the package proposed in this paper. © 2012 IEEE.

DOI： 10.1109/EDAPS.2012.6469405

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Experimental verification of signal integrity deterioration due to package-common-mode resonance 査読有り

Nishimoto T., Asai R., Matsushima T., Hisakado T., Wada O.

IEEE International Symposium on Electromagnetic Compatibility 2012年12月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

When an LSI package is mounted on a PCB, parasitic couplings are unintentionally generated between them. Antiresonance of these couplings (package-common-mode resonance) can cause degradation of signal and power integrity. In this paper, the authors experimentally verified the package-common-mode resonance by comparing scattering parameters with variation of CMOS output jitter. In order to suppress increase of the jitter, resister-dumping method was tested as a countermeasure. © 2012 IEEE.

DOI： 10.1109/EMCEurope.2012.6396871

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Degradation of signal integrity due to package-common-mode resonance caused by external conductive noise in power supply system 査読有り

Matsushima T., Asai R., Nishimoto T., Wada O.

cccc2012 Asia-Pacific Symposium on Electromagnetic Compatibility, APEMC 2012 - Proceedings 85 - 88 2012年08月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Package-common-mode resonance which is caused by a parasitic capacitance and a parasitic inductance between package and PCB grounds degrades signal and power integrity. A parasitic capacitance between a package ground and a PCB ground resonates with a parasitic inductance at ground connections, such as solder balls in a BGA package. In this paper, the authors simulate ground bounce due to the package-common-mode resonance caused by external conductive noise in a power supply system. The ground bounce degrades signal integrity of CMOS output signal. The authors demonstrated an increase in jitter of CMOS output at the package-common-mode resonance frequency. © 2012 IEEE.

DOI： 10.1109/APEMC.2012.6237999

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Verification of common-mode-current prediction method based on imbalance difference model for single-channel differential signaling system 査読有り

Matsushima T., Wada O., Watanabe T., Toyota Y., Koga L.

cccc2012 Asia-Pacific Symposium on Electromagnetic Compatibility, APEMC 2012 - Proceedings 409 - 412 2012年08月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

In a differential transmission line, a large common-mode current is excited due to its asymmetry. In this paper, the authors demonstrate experimentally the common-mode current and verify the imbalance difference model that was proposed for prediction of the common-mode current reduction. Experimental results show that the reduction of common-mode current of about 20 dB is achieved by changing the position of the transmission line. In addition, the differences that are calculated using the imbalance difference model are in agreement with the measured ones within 2 dB. © 2012 IEEE.

DOI： 10.1109/APEMC.2012.6237956

その他リンク： https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84864859927&origin=inward

Power supply current analysis of micro-controller with considering the program dependency 査読有り

Wada O., Saito Y., Nomura K., Sugimoto Y., Matsushima T.

Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011 93 - 98 2011年12月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

To simulate power supply noise of an LSI, an EMC macro-model, LECCS-core, is under development. The LECCS-core model consists of a linear equivalent circuit and equivalent current sources. In this paper, program-dependent current elements are extracted for functional blocks of a microcontroller. By combining these component currents with considering the program sequence, the power supply current is simulated both in time domain and frequency domain. Even when the LSI runs different programs with different clock frequencies, noise spectra consisting of harmonics and sub-harmonics are reproduced in good agreement with measured data. © 2011 Univ of Zagreb.

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SI/PI degradation due to package-common-mode resonance caused by parasitic capacitance between package and PCB 査読有り

Matsushima T., Hirayama N., Hisakado T., Wada O.

Proceedings of the 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits 2011, EMC COMPO 2011 213 - 218 2011年12月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

Package-common-mode resonance which is caused by a parasitic capacitance and parasitic inductances between package and PCB grounds makes degradation of signal and power integrity. A parasitic capacitance between a package ground and a PCB ground anti-resonates with a parasitic inductance at ground connections such as solder balls in a BGA package. In this resonance, currents flow on power and ground lines in the package with the same phase. Thus, the authors name this antiresonance "Package-common-mode resonance". The package-common-mode resonance causes the power and/or ground bounce and increase of jitter of the output signal. According to measurement results of test boards, the resonance frequency is depend on the number of ground connection because the parasitic inductance is decreased by increasing ground connection. For example, the resonance frequency was changed from 575 MHz to 862 MHz in the test board when the number of the ground connection was decupled. © 2011 Univ of Zagreb.

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Prediction of EMI from two-channel differential signaling system based on imbalance difference model 査読有り

Matsushima T., Watanabe T., Toyota Y., Koga R., Wada O.

IEEE International Symposium on Electromagnetic Compatibility 413 - 418 2010年12月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

In a differential transmission line, a large common-mode radiation is excited due to asymmetry. To suppress the radiation, the differential line must be designed electrically symmetric. In this paper, the imbalance difference model, which was proposed by the authors for estimation of common-mode radiation, is extended to apply the differential signaling system. The authors focus on two pairs of differential transmission lines with asymmetric property, which consists of an adjacent return plane and signal lines which are placed close to an edge of the return plane. The authors define five transmission modes; two normal modes, two primary common modes and a secondary common mode. In these transmission modes, the secondary common mode radiation is dominant, and the authors evaluate the radiation using the imbalance difference model. To reduce the common-mode radiation, placing a guard trace which has the same potential as that of the return plane, we can control the imbalance and reduce common-mode radiation even the transmission line has asymmetry. The reduction of common-mode radiation can be estimated quantitatively by calculation of the imbalance of the transmission line. ©2010 IEEE.

DOI： 10.1109/ISEMC.2010.5711310

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Calculation of common-mode radiation from single-channel differential signaling system using imbalance difference model 査読有り

Matsushima T., Watanabe T., Toyota Y., Koga R., Wada O.

IEICE Transactions on Communications E93-B ( 7 ) 1739 - 1745 2010年01月

記述言語：英語掲載種別：研究論文（学術雑誌）

In a differential transmission line, a large common-mode radiation is excited due to its asymmetry. In this paper, the imbalance difference model, which was proposed by the authors for estimation of common-mode radiation, is extended to apply to the differential signaling systems. The authors focus on a differential transmission line with asymmetric property, which consists of an adjacent return plane and two signal lines which are placed close to an edge of the return plane. Three orthogonal transmission modes, a normal mode, a primary common mode and a secondary common mode, are defined. Among these transmission modes, the secondary common mode is dominant in radiation, and a mechanism of the secondary common-mode generation is explained. The radiated emission which was calculated using the imbalance difference model was in good agreement with that obtained by full wave calculation. © 2010 The Institute of Electronics, Information and Communication Engineers.

DOI： 10.1587/transcom.E93.B.1739

その他リンク： https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=77954319061&origin=inward

Suppression of guard-trace resonance by matched termination for reducing common-mode radiation 査読有り

Watanabe T., Matsushima T., Toyota Y., Wada O., Koga R.

IEICE Transactions on Communications E93-B ( 7 ) 1746 - 1753 2010年01月

記述言語：英語掲載種別：研究論文（学術雑誌）

We propose a novel technique of matching at both ends of the guard trace to suppress resonance. This approach is derived from the viewpoint that the guard trace acts as a transmission line. We examined that matched termination suppresses guard-trace resonance through simulating a circuit and measuring radiation. We found from these results that the proposed method enables guard-trace voltages to remain low and hence avoids increases in radiation. In addition, we demonstrated that "matched termination at the far end of the guard trace" could suppress guard-trace resonance sufficiently at all frequencies. We eventually found that at least two vias at both ends of the guard trace and only one matching resistor at the far end could suppress guard-trace resonance. With respect to fewer vias, the method we propose has the advantage of reducing restrictions in the printed circuit board layout at the design stage. © 2010 The Institute of Electronics, Information and Communication Engineers.

DOI： 10.1587/transcom.E93.B.1746

その他リンク： https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=77954317277&origin=inward

Linear equivalent circuit and current sources model including separation resistances in the ground connection for multiple power-supply pin LSI 査読有り

Saito Y., Yasuhara M., Mabuchi Y., Matsushima T., Hisakado T., Wada O.

IEEJ Transactions on Electronics, Information and Systems 130 ( 11 ) 2010年01月

記述言語：英語掲載種別：研究論文（学術雑誌）

An EMC macro-model for LSIs, named the LECCS-core model, is under development for simulating high frequency noise in power supply currents. In this paper, the conventional LECCS-core model is extended by adding resistances in the ground connection of an LSI, in order to separate the core block and the analog block. The model parameters are identified using symbolic analysis and least-square optimization. Using this new model, the transfer impedances between different power supply pins can be simulated accurately. Additionally we derived the equivalent internal current sources by using that model. As a result, we confirmed that the internal current sources were improved. In conclusion, we confirmed that the configuration of the linear equivalent circuit and our modeling method can be applied widely to microcontrollers of the same block configuration. © 2010 The Institute of Electrical Engineers of Japan.

DOI： 10.1541/ieejeiss.130.1897

その他リンク： https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=78650315066&origin=inward

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