Papers - MIYASE Kouhei
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Formal Test Point Insertion for Region-based Low-Capture-Power Compact At-Speed Scan Test Reviewed
173 - 178 2016.12
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On Optimal Power-Aware Path Sensitization Reviewed
179 - 184 2016.12
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Logic-path-and-clock-path-aware at-speed scan test generation Reviewed
E99A ( 12 ) 2310 - 2319 2016.12
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SAT-Based Post-Processing for Regional Capture Power Reduction in At-Speed Scan Test Generation "jointly worked" Reviewed
Stephan Eggersgluss, Kohei Miyase, Xiaoqing Wen
European Test Symposium 2016.05
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Logic/Clock-Path-Aware AtSpeed Scan Test Generation for Avoiding False Capture Failures and Reducing Clock Stretch "jointly worked" Reviewed
Koji Asada, Xiaoqing Wen, Stefan Holst, Kohei Miyase, Seiji Kajihara, Michael Kochte, Eric Schneider, Hans-Joachim Wunderlich, Jun Qian
Proc. Asian Test Symposium 1 - 6 Session 4A. 2015.11
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A Soft-Error Tolerant TCAM Using Partial Don't-Care Keys "jointly worked" Reviewed
Infall Syafalni, Tsutomu Sasao, Xiaoqing Wen, Stefan Holst, Kohei Miyase
European Test Symposium Poster Session #2 2015.05
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Identification of High Power Consuming Areas with Gate Type and Logic Level Information "jointly worked" Reviewed
Kohei Miyase, Matthias Sauer, Bernd Becker, Xiaoqing Wen, Seiji Kajihara
Proc. European Test Symposium 1 - 6 Paper9.1-1 2015.05
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Soft-error tolerant TCAMs for high-reliability packet classifications "jointly worked" Reviewed
Infall Syafalni, Tsutomu Sasao, Xiaoqing Wen, Stefan Holst, Kohei Miyase
2014 IEEE Asia Pacific Conference on Circuits and Systems 471 - 474 2014.11
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On Achieving Capture Power Safety in At-Speed Scan-Based Logic BIST "jointly worked" Reviewed
Akihiro Tomita, Xiaoqing Wen, Yasuo Sato, Seiji Kajihara, Kohei Miyase, Stefan Holst, Patrick Girard, Mohammad Tehranipoor, Laung-Terng Wang
IEICE Transactions on Information and Systems 97-D ( 10 ) 2706 - 2718 2014.10
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Search Space Reduction for Low-Power Test Generation "jointly worked" Reviewed
Kohei Miyase, Matthias Sauer, Bernd Becker, Xiaoqing Wen, Seiji Kajihara
Asian Test Symposium 171 - 176 2013.11
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Scan-Out Power Reduction for Logic BIST "jointly worked" Reviewed
Senling Wang, Yasuo SATO, Seiji Kajihara, Kohei Miyase
IEICE Transactions on Information and Systems E96-D ( 9 ) 2012 - 2020 2013.09
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A Capture-Safety Checking Metric Based on Transition-Time-Relation for At-Speed Scan Testing "jointly worked" Reviewed
Kohei Miyase, Ryota Sakai, Xiaoqing Wen, Masao Aso, Hiroshi Furukawa, Yuta Yamato, Seiji Kajihara
IEICE Transactions on Information and Systems E96-D ( 9 ) 2003 - 2011 2013.09
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LCTI-SS: Low-Clock-Tree-Impact Scan Segmentation for Avoiding Shift Timing Failures in Scan Testing "jointly worked" Reviewed
Yuta Yamato, Kohei Miyase, Seiji Kajihara, Xiaoqing Wen, Laung-Terng Wang, Michael A. Kochte
IEEE Design & Test 30 ( 4 ) 60 - 70 2013.07
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On Guaranteeing Capture Safety in At-Speed Scan Testing with Broadcast-Scan-Based Test Compression Reviewed
Kazunari Enokimoto, Xiaoqing Wen, Kohei Miyase, Jiun-Lang Huang, Seiji Kajihara, Laung-Terng Wang
26th Intl. Conf. on VLSI Design 279 - 284 2013.01
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A scan-out power reduction method for multi-cycle BIST Reviewed
272 - 277 2012.12
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Estimating the number of Don't-Care Bits in Test Vectors "jointly worked" Reviewed
Kohei Miyase, Seiji Kajihara, Xiaoqing Wen
IEEE Workshop on RTL and High Level Testing 2012.11
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On Pinpoint Capture Power Management in At-Speed Scan Test Generation Reviewed
Xiaoqing Wen, Y. Nishida, Kohei Miyase, Seiji Kajihara, Patrick Girard, Mohammad Tehranipoor, Laung-Terng Wang
International Test Conference Paper 6.1 2012.11
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Low Power BIST for Scan-Shift and Capture Power "jointly worked" Reviewed
Yasuo Sato, Senling Wang, Takaaki Kato, Kohei Miyase, Seiji Kajihara
Asian Test Symposium 173 - 178 2012.11
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A Novel Capture-Safety Checking Method for Multi-Clock Designs and Accuracy Evaluation with Delay Capture Circuits "jointly worked" Reviewed
[28] Kohei Miyase, Masao Aso, Ryou Ootsuka, Xiaoqing Wen, Hiroshi Furukawa, Yuta Yamato, Kazunari Enokimoto, Seiji Kajihara
VLSI Test Symposium 197 - 202 2012.04
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Additional Path Delay Fault Detection with Adaptive Test Data "jointly worked" Reviewed
Kohei Miyase, Hiroaki Tanaka, Kazunari Enokimoto, Xiaoqing Wen, Seiji Kajihara
IEEE Workshop on RTL and High Level Testing 2011.11