Papers - MORIE Takashi
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Investigation for Multilevel Memory Capability of ReRAM using Ta2O5-δ Insulator Reviewed
Y. Li, R. Katsumura, M. K. Gronroos, A. Tsurumaki-Fukuchi, M. Arita, H. Andoh, T. Morie, Y. Takahashi
IEEE Silicon Nanoelectronics Workshop (SNW) 78 - 79 2018.06
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Live Demonstration: A Hardware Accelerated Robot Middleware Package for Intelligent Processing on Robots Reviewed
Ishida Y., Morie T., Tamukoh H.
Proceedings - IEEE International Symposium on Circuits and Systems 2018.05
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A Hardware Accelerated Robot Middleware Package for Intelligent Processing on Robots Reviewed
Ishida Y., Morie T., Tamukoh H.
Proceedings - IEEE International Symposium on Circuits and Systems 2018-May 2018.04
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A pulse-width-modulation mode CMOS integrated circuit implementation of threshold-coupled map Reviewed
Uenohara Seiji, Morie Takashi, Tamukoh Hakaru, Aihara Kazuyuki
Nonlinear Theory and Its Applications, IEICE 9 ( 2 ) 268 - 280 2018.04
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A shared synapse architecture for efficient FPGA implementation of autoencoders Reviewed
13 ( 3 ) e0194049 2018.03
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Brain-like analog computing and its dedicated integrated circuit Invited Reviewed
Takashi Morie
Artificial Intelligence 33 ( 1 ) 39 - 44 2018.01
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A hardware-oriented dropout algorithm for efficient FPGA implementation Reviewed
10639 LNCS 821 - 829 2017.11
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An implementation of a spiking neural network using digital spiking silicon neuron model on a SIMD processor Reviewed
10613 LNCS 437 - 438 2017.09
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Fostering Professional Personnel for Intelligent Car and Robotics in Car-Robo Joint Graduate School Invited Reviewed
J. of JSEE 65 ( 4 ) 51 - 56 2017.07
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Evaluation of multilevel memory capability of ReRAM using Ta<inf>2</inf>O<inf>5</inf>insulator and different electrode materials Reviewed
85 - 86 2017.06
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Synchronization of Pulse-Coupled Phase Oscillators over Multi-FPGA Communication Links Reviewed
D. Pramanta, T. Morie, H. Tamukoh
Journal of Robotics, Networking and Artificial Life 4 ( 1 ) 91 - 96 2017.06
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Self-Feedback Electrically Coupled Spin-Hall Oscillator Array for Pattern-Matching Operation Reviewed
K. Kudo, T. Morie
Appl. Phys. Express 10 ( 4 ) 043001 2017.03
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Multi-Valued Quantization Neural Networks toward Hardware Implementation Reviewed
Y. Aratani, Y. Y. Jye, A. Suzuki, D. Shuto, T. Morie, H. Tamukoh
Proc. of the 2017 International Conference On Artificial Life And Robotics (ICAROB2017) 58 - 58 2017.01
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Implementation of multi-FPGA Communication using Pulse-Coupled Phase Oscillators Reviewed
D. Pramanta, T. Morie, H. Tamukoh
Proc. of the 2017 International Conference On Artificial Life And Robotics (ICAROB2017) 57 - 57 2017.01
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An Electrically Coupled Spin-Hall Oscillator Array for Pattern Matching Operation Reviewed
K. Kudo, T. Morie
61st Annual Conf. on Magnetism and Magnetic Materials (MMM 2016) 2016.11
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A CMOS Unit Circuit Using Subthreshold Operation of MOSFETs for Chaotic Boltzmann Machines Reviewed
M. Yamaguchi, T. Kato, Q. Wang, H. Suzuki, H. Tamukoh, T. Morie
Proc. 23rd Int. Conf. on Neural Information Processing (ICONIP2016) 9947 248 - 255 2016.10
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FPGA Implementation of Autoencoders Having Shared Synapse Architecture Reviewed
A. Suzuki, T. Morie, H. Tamukoh
Proc. 23rd Int. Conf. on Neural Information Processing (ICONIP2016) 9947 231 - 239 2016.10
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Time-domain Weighted-sum Calculation for Ultimately Low Power VLSI Neural Networks Reviewed
Q. Wang, H. Tamukoh, T. Morie
Proc. 23rd Int. Conf. on Neural Information Processing (ICONIP2016) 9947 240 - 247 2016.10
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Analog VLSI Circuits and Devices for Neuro-Inspired Time-Domain Computing Invited Reviewed
T. Morie
Ext. Abstracts of Int. Conf. on Solid State Devices and Materials (SSDM 2016) 117 - 118 2016.09
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Hardware-oriented Algorithm for Chaotic Boltzmann Machines Reviewed
I. Kawashima, S. Uenohara, T. Kato, M. Yamaguchi, H. Suzuki, T. Morie, H. Tamukoh
Int. Workshop on Smart Info-Media Systems in Asia (SISA) 2016.09