Papers - MORIE Takashi
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New Functional Device Characteristics with 2-Dimensional Array of Si Nanodisks Fabricated by Combination of Bio-Template and Ultimate Top-down Etching Reviewed
M. Igarashi,C. H. Huang,M. Tomura,M. Takeguchi,S. Horita,Y. Uraoka,T. Fuyuki,I. Yamashita,T. Morie,S. Samukawa
Ext. Abstracts of Int. Conf. on Solid State Devices and Materials (SSDM) 1364 - 1365 2009.08
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A CMOS Spiking Neural Network Circuit with Symmetric/Asymmetric STDP Function, Reviewed
H. Tanaka,T. Morie,K. Aihara
IEICE Trans. Fundamentals E92-A ( 7 ) 2009.07
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Coarse Image Region Segmentation Using Region- and Boundary-based Coupled MRF Models and Their PWM VLSI Implementation Reviewed
Y. Kawashima,D. Atuti,K. Nakada,M. Okada,T. Morie
Proc. Int. Joint Conf. on Neural Networks (IJCNN 2009) 1559 - 1565 2009.06
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A Current-Sampling-Mode CMOS Arbitrary Chaos Generator Circuit Using Pulse Modulation Approach, Reviewed
D. Atuti,T. Morie,K. Aihara
IEICE Trans. Fundamentals E92-A ( 5 ) 1308 - 1315 2009.05
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パルス変調方式を用いた電流サンプリング型CMOS任意カオス生成回路,
厚地泰輔,森江隆,合原一幸
電気学会電子回路研究会, ECT-09-19, 25 - 30 2009.01
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時空間ガボールフィルタによる土砂災害前兆現象検知
岡本健,渡辺敏雄,花沢明俊,森江隆,伴弘司,前田裕二
電子情報通信学会 パターン認識・メディア理解研究会, PRMU2008-131 108 ( 327 ) 139 - 144 2008.11
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A Prototype System for Secure Human-Machine Interaction Based on Face and Gesture Recognition, Reviewed
I..R. Khan,T. Morie,H. Miyamoto,M. Shimizu,and Y. Kuriya
The 34th Annual Conf. of the IEEE Industrial Electronics Society (IECON'08), 1572 - 1577 2008.11
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時間領域情報処理による脳型集積システム
森江隆,田中 秀樹,厚地 泰輔,是角 圭祐,中田 一紀
電子情報通信学会 ニューロコンピューティング研究会, NC2008-68 108 ( 281 ) 55 - 60 2008.11
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MOSFETのしきい値電圧の温度依存性を利用した温度補償電流源回路とその応用,
中島規成,森江隆
電気学会C部門 電子回路研究会, ECT-08-64 1 - 5 2008.10
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Face and Arm-Posture Recognition for Secure Human-Machine Interaction Reviewed
I. R. Khan,T. Morie,H. Miyamoto
IEEE Int. Conf. on Systems, Man and Cybernetics (SMC2008) 411 - 417 2008.10
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CMOS Pulse-Modulation Circuit Implementation of Phase-Locked Loop Neural Networks, Reviewed
D. Atuti,K. Nakada,T. Morie
IEEE Int. Symp. on Circuits and Systems (ISCAS2008) 2174 - 2177 2008.05
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領域ベース結合MRFモデルによる大局的画像領域分割とCMOS回路実現
川嶋佑輔,厚地泰輔,中田一紀,岡田真人,森江隆
電子情報通信学会 ニューロコンピューティング研究会, NC2007-120 107 ( 542 ) 49 - 54 2008.03
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パルス変調方式による相互結合位相振動子のCMOS 回路実現と評価
厚地泰輔,加藤直人,中田一紀,森江 隆
電気学会電子回路研究会 25 - 29 2007.12
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STDPを有するCMOSスパイキングニューラルネットワークLSIの評価
田中秀樹,森江隆,合原一幸
電子情報通信学会 ニューロコンピューティング研究会, NC2007-61 107 ( 328 ) 37 - 42 2007.11
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Projection-field-type VLSI Convolutional Neural Networks Using Merged/Mixed Analog-Digital Approach Reviewed
O. Nomura,T. Morie
Neural Information Processing (Lecture Notes in Computer Science, Springer Berlin/Heidelberg 4984/2008 1081 - 1090 2007.11
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Projection-field-type VLSI Convolutional Neural Networks Using Merged/Mixed Analog-Digital Approach Reviewed
O. Nomura,T. Morie
14th Int. Conf. on Neural Information Processing (ICONIP2007) 196 - 196 2007.11
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Brain-inspired Visual Processing: Real-time Face Authentication, arm Posture Recognition, and Shadow Elimination Reviewed
T. Morie,H. Miyamoto,A. Hanazawa,I. R. Khan,T. Kamada,Y. Kuriya,and M. Shimizu
4th Int. Conf. on Brain-Inspired Information Technology (BrainIT2007) 33 - 33 2007.11
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An FPGA-based Collision Warning System Using Hybrid Approach Reviewed
H. Liang,T. Morie,Y. Suzuki,K. Nakada,T. Miki,H. Hayashi
7th Int. Conf. on Hybrid Intelligent Systems (HIS07) 30 - 35 2007.09
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CMOS Circuit Implementation of a Coupled Phase Oscillator System Using Pulse Modulation Approach Reviewed
D. Atuti,N. Kato,K. Nakada,T. Morie
2007 European Conference on Circuit Theory and Design (ECCTD 2007) 827 - 830 2007.08
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A Pulse-Modulation Circuit for Nonlinear Systems with Self Regulatory Threshold Dynamics Reviewed
D. Atuti,T. Morie,K. Aihara
15th IEEE Int. Workshop on Nonlinear Dynamics of Electronic Systems (NDES 2007) 145 - 148 2007.07