研究者詳細 - 田向　権

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Object Recognition System using Deep Learning with Depth Images for Service Robots 査読有り

Yoshimoto Y., Tamukoh H.

ISPACS 2018 - 2018 International Symposium on Intelligent Signal Processing and Communication Systems 436 - 441 2018年11月

担当区分：最終著者記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

In an aging society with fewer children, service robots are expected to play an increasingly important role in people's lives. To realize a future with service robots, a generic object recognition system is necessary to recognize a wide variety of objects with a high degree of accuracy. Therefore, this study employs deep convolutional neural networks for the generic object recognition system. To improve the accuracy of object recognition, both RGB images and depth images can be used effectively. In this paper, we propose a new architecture 'Dual Stream - VGG16 (DS-VGG16)' for a deep convolutional neural network to train both the RGB images and depth images, and we also present a new training method for the proposed architecture. The experimental results indicate that the proposed architecture and training method are effective. Finally, we develop an object recognition system based on the proposed method that has an interface of robot operating system for integrating the system into service robots.

DOI： 10.1109/ISPACS.2018.8923533

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論理知識型AI に基づく自動運転のための危険予測システムの構築と評価査読有り

橋本康平, 石田裕太郎, 市瀬龍太郎, 我妻広明, 田向権

システム制御情報学会論文誌 ( 一般社団法人システム制御情報学会 ) 31 ( 5 ) 191 - 201 2018年08月

担当区分：最終著者記述言語：日本語掲載種別：研究論文（学術雑誌）

Danger forecast and its avoidance are highly important for the design of automated driving system and the function is expected to be solved by artificial intelligences (AIs). However the reasoning process is unclear in the conventional scheme such as machine learning and as deep neural network models. In this paper, we focus on the ability of the logical reasoning based on the Semantic Web techniques, which is called knowledge-based AI, and demonstrate successfully its implementation into a module of Robot Operating System (ROS) to control a real vehicle. The processing speed of proposed system is evaluated using the real vehicle in the situation of the pedestrian avoidance in the crossroad.

DOI： 10.5687/iscie.31.191

その他リンク： https://ci.nii.ac.jp/naid/130007433558

A molecular neuromorphic network device consisting of single-walled carbon nanotubes complexed with polyoxometalate 査読有り

Tanaka H., Akai-Kasaya M., Termehyousefi A., Hong L., Fu L., Tamukoh H., Tanaka D., Asai T., Ogawa T.

Nature Communications 9 ( 1 ) 2018年07月

記述言語：英語掲載種別：研究論文（学術雑誌）

© 2018 The Author(s). In contrast to AI hardware, neuromorphic hardware is based on neuroscience, wherein constructing both spiking neurons and their dense and complex networks is essential to obtain intelligent abilities. However, the integration density of present neuromorphic devices is much less than that of human brains. In this report, we present molecular neuromorphic devices, composed of a dynamic and extremely dense network of single-walled carbon nanotubes (SWNTs) complexed with polyoxometalate (POM). We show experimentally that the SWNT/POM network generates spontaneous spikes and noise. We propose electron-cascading models of the network consisting of heterogeneous molecular junctions that yields results in good agreement with the experimental results. Rudimentary learning ability of the network is illustrated by introducing reservoir computing, which utilises spiking dynamics and a certain degree of network complexity. These results indicate the possibility that complex functional networks can be constructed using molecular devices, and contribute to the development of neuromorphic devices.

DOI： 10.1038/s41467-018-04886-2

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A Hardware Accelerated Robot Middleware Package for Intelligent Processing on Robots 査読有り

Yutaro Ishida, Takashi Morie, Hakaru Tamukoh

International Symposium on Circuits and Systems (ISCAS2018) 1 - 5 2018年05月

Live Demonstration: A Hardware Accelerated Robot Middleware Package for Intelligent Processing on Robots 査読有り

Yutaro Ishida, Takashi Morie, Hakaru Tamukoh

International Symposium on Circuits and Systems (ISCAS2018) 1 - 1 2018年05月

論理知識型AIに基づく自動運転のための危険予測システムの構築と評価査読有り

橋本康平，石田裕太郎，市瀬龍太郎，我妻広明，田向権

システム制御情報学会論文誌 31 ( 5 ) 191 - 201 2018年05月

A Hardware Accelerated Robot Middleware Package for Intelligent Processing on Robots 査読有り

Ishida Y., Morie T., Tamukoh H.

Proceedings - IEEE International Symposium on Circuits and Systems 2018-May 2018年04月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

© 2018 IEEE. Service robots require implementation of intelligent processing, e.g., image processing. However, the computational resources of standard PCs typically used in service robots are not sufficient for such processes. Furthermore, robot middleware is widely used in many robots because such systems facilitate integration and are suitable for rapid prototyping. We propose a 'connective object for middleware to accelerator (COMTA),' which is a processing system that uses hardware accelerators, i.e., field programmable gate arrays (FPGAs), and robot middleware. Users can access the FPGAs in the proposed system via middleware interfaces; thus, complex internal circuits are not required. For human tracking using image processing, the proposed system can automatically generate from a single configuration file. The proposed system performs 3.3 times more efficiently relative to computation than standard PCs in robots.

DOI： 10.1109/ISCAS.2018.8351722

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Live Demonstration: A Hardware Accelerated Robot Middleware Package for Intelligent Processing on Robots 査読有り

Ishida Y., Morie T., Tamukoh H.

Proceedings - IEEE International Symposium on Circuits and Systems 2018-May 2018年04月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

© 2018 IEEE. This live demonstration presents a 'connective object for middleware to accelerator (COMTA),' an intelligent processing system that uses hardware accelerators (i.e., field programmable gate arrays (FPGAs)) and robot middleware. The key idea of COMTA is to automatically generate the system via robot middleware interfaces. To realize the proposed system, we have developed a block of programs called an 'object' in a hardware/software complex system. We demonstrate an implementation of a human tracking image processing application on a vehicle robot accelerated by COMTA. The demonstration system achieved 3.3 times better power efficiency than a general PCs.

DOI： 10.1109/ISCAS.2018.8351837

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A pulse-width-modulation mode CMOS integrated circuit implementation of threshold-coupled map 査読有り

Seiji Uenohara, Takashi Morie, Hakaru Tamukoh, and Kazuyuki Aihara

Nonlinear Theory and Its Applications 9 ( 2 ) 268 - 280 2018年04月

A shared synapse architecture for efficient FPGA implementation of autoencoders 査読有り

Akihiro Suzuki, Takashi Morie and Hakaru Tamukoh

PLoS ONE 13 ( 3 ) 2018年03月

A shared synapse architecture for efficient FPGA implementation of autoencoders 査読有り

Suzuki A., Morie T., Tamukoh H.

PLoS ONE 13 ( 3 ) 2018年03月

記述言語：英語掲載種別：研究論文（学術雑誌）

Copyright: © 2018 Suzuki et al. This is an open access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited. This paper proposes a shared synapse architecture for autoencoders (AEs), and implements an AE with the proposed architecture as a digital circuit on a field-programmable gate array (FPGA). In the proposed architecture, the values of the synapse weights are shared between the synapses of an input and a hidden layer, and between the synapses of a hidden and an output layer. This architecture utilizes less of the limited resources of an FPGA than an architecture which does not share the synapse weights, and reduces the amount of synapse modules used by half. For the proposed circuit to be implemented into various types of AEs, it utilizes three kinds of parameters; one to change the number of layers’ units, one to change the bit width of an internal value, and a learning rate. By altering a network configuration using these parameters, the proposed architecture can be used to construct a stacked AE. The proposed circuits are logically synthesized, and the number of their resources is determined. Our experimental results show that single and stacked AE circuits utilizing the proposed shared synapse architecture operate as regular AEs and as regular stacked AEs. The scalability of the proposed circuit and the relationship between the bit widths and the learning results are also determined. The clock cycles of the proposed circuits are formulated, and this formula is used to estimate the theoretical performance of the circuit when the circuit is used to construct arbitrary networks.

DOI： 10.1371/journal.pone.0194049

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Mixed precision weight networks: training neural networks with varied precision weights 査読有り

Fuengfusin N., Tamukoh H.

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 11302 LNCS 614 - 623 2018年01月

記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

© 2018, Springer Nature Switzerland AG. We propose Mixed Precision Weight Networks (MPWNs), neural networks that jointly utilize weights with varied precision in the layers. MPWNs constrain the weight layers to either 1-bit binary {-1,1}, 2-bit ternary {-1,0,1}, or the original 32-bit full precision weights. Each weight space contains unique properties for instance, high classification accuracy, small number of bit, and high sparsity. Hence, the properties of MPWNs can be adjusted by varying the combinations and orders of the weight layers. In this study, we identify three heuristic rules for effectively setting each of the weight layers. Therefore, MPWNs successfully utilize the robust properties from each weight space while avoiding their disadvantages. We evaluated MPWNs with MNIST, CIFAR-10, and CIFAR-100 training datasets. Our evaluation revealed that MPWNs models trained on CIFAR-10 and CIFAR-100 achieved the best overall properties comparing to conventional methods.

DOI： 10.1007/978-3-030-04179-3_54

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自動運転のための運転行動意思決定システム開発に向けた統合シミュレータの構築査読有り

三好竜平, 宮崎椋瑚, 橋本康平, 石田祐太郎, 渡辺政彦, 宇井健一, 市瀬龍太郎, 我妻広明, 田向権

日本知能情報ファジィ学会ファジィシステムシンポジウム講演論文集 ( 日本知能情報ファジィ学会 ) 34 ( 0 ) 450 - 455 2018年01月

担当区分：最終著者記述言語：日本語掲載種別：研究論文（学術雑誌）

自動運転は，人工知能（AI）によってコンピュータ上で実行される．事故が発生した場合，自動運転システムは事故の原因を分析するために意思決定の根拠を示すべきである．本報告では，意思決定の根拠を示す知識ベースAIの統合シミュレータを提案する．シミュレータを構築するには，Autoware，Gazebo，知識ベースAIを組み合わせる． Autowareは自動運転用のオープンソースソフトウェアであり，Gazeboは任意の道路環境をシミュレートすることができる．提案シミュレータを用いて，自動運転のための知識ベースAIの実用性を何度も検証することができる．実験結果は，提案されたシミュレータが意思決定の根拠の提示に成功していることを示している．

DOI： 10.14864/fss.34.0_450

その他リンク： https://ci.nii.ac.jp/naid/130007554747

AP SoCによるFPGAとRTミドルウェアの連携査読有り

岩渕甲誠, 内田大貴, 石田裕太郎, 長瀬雅之, 田向権

ロボティクス・メカトロニクス講演会講演概要集 ( 一般社団法人日本機械学会 ) 2018 ( 0 ) 2A1 - G10 2018年01月

担当区分：最終著者記述言語：日本語掲載種別：研究論文（学術雑誌）

In recent years, robots has come to have useful, but high load functions, e.g. navigating automotive movement, image recognition by deep learning. Usually, these functions are executed by high-spec CPU or GPUs. However, in practical use these devices cannot be implemented into robot, because of the size or power consumption. So in this research we implemented image filter function on FPGA included in AP SoC as a sample of high load function. And we have also implemented RT-Middleware and some RT-Components as a sample robot system which includes a component handling FPGA on CPU included in AP SoC. We show the effectiveness of the collaboration with FPGA and RT-Middleware to develop robot system.

DOI： 10.1299/jsmermd.2018.2A1-G10

その他リンク： https://ci.nii.ac.jp/naid/130007551490

競技会活動を通じたホームサービスロボットの研究開発査読有り

吉元裕真, 岩元剛毅, 橋本康平, 森江隆, 田向権, 堀三晟, 石田裕太郎, 木山雄太, 黒田裕貴, 田中悠一朗, 久野昌隆, 藤田啓斗, 新谷嘉也

ロボティクス・メカトロニクス講演会講演概要集 ( 一般社団法人日本機械学会 ) 2018 ( 0 ) 2P2 - E02 2018年01月

記述言語：日本語掲載種別：研究論文（学術雑誌）

In real world applications of home service robots, they are required to be able to perform housekeeping or other tasks. "RoboCup@Home" is a competition for benchmarking home service robots. It includes tests to service robots for real world implementation. These tests require the combination of intelligent functions such as object detection and voice recognition. We have developed a home service robot "Exi@" and evaluated its performance by participating in RoboCup@Home. This paper describes real world implementation of robots and RoboCup@Home. The functions embedded in Exi@ and a task "Restaurant" are also explained.

DOI： 10.1299/jsmermd.2018.2P2-E02

その他リンク： https://ci.nii.ac.jp/naid/130007552042

ホームサービスロボットにおける命令文中の単語意味ベクトルに注目した最適行動識別査読有り

石田裕太郎, 能勢啓輔, 安藤充宏, 田向権

ロボティクス・メカトロニクス講演会講演概要集 ( 一般社団法人日本機械学会 ) 2018 ( 0 ) 2P1 - B18 2018年01月

担当区分：最終著者記述言語：日本語掲載種別：研究論文（学術雑誌）

Service robots must assemble and execute its own action based on user's voice instructions. Additionally, in order to assist human daily life, the service robots execute not a single action like an industrial robot but plurality of actions must be combined according to the situation. As the number of actions the robots can perform increases, phrase of the voice instructions increases to an enormous pattern. Therefore, the robots must understand the instructions by natural language processing. In this paper, we focus on general purpose service robot (GPSR) task of RoboCup@Home, which is a competition for performance of the service robots, and identify behavior of the robots from natural language by using word vectorization and machine learning.

DOI： 10.1299/jsmermd.2018.2P1-B18

その他リンク： https://ci.nii.ac.jp/naid/130007551866

A pulse-width-modulation mode CMOS integrated circuit implementation of threshold-coupled map 査読有り

Uenohara Seiji, Morie Takashi, Tamukoh Hakaru, Aihara Kazuyuki

Nonlinear Theory and Its Applications, IEICE ( 一般社団法人電子情報通信学会 ) 9 ( 2 ) 268 - 280 2018年01月

記述言語：英語掲載種別：研究論文（学術雑誌）

We propose a coupled-map-lattice complementary-metal-oxide-semiconductor very-large-scale-integration (CMOS VLSI) circuit based on the threshold-coupled map (TCM) that has been proposed previously as a unidirectional connected network model exhibiting different spatiotemporal patterns according to its underlying nonlinear map and update scheme. We introduce mutual connections and arbitrarily valued connection weights into the TCM to realize cellular automata. In this study, we design, fabricate, and evaluate a CMOS integrated circuit with which to implement this extended TCM (ETCM). The ETCM is a universal Turing machine as confirmed in circuit experiments using the fabricated circuit, which can achieve Rule110 of a one-dimensional cellular automaton.

DOI： 10.1587/nolta.9.268