Faculty Profiles - OMURA Ichiro

Papers - OMURA Ichiro

Division display141 - 160 of about 190／ All the affair displays >>

New measurement base De-embedded CPU load model for power delivery network design Reviewed

Okano M., Watanabe K., Naitoh M., Omura I.

9th International Conference on Power Electronics - ECCE Asia: "Green World with Power Electronics", ICPE 2015-ECCE Asia 2288 - 2293 2015.07

Language：English Publishing type：Research paper (international conference proceedings)

CPU load model including on-chip wiring and package interconnection has been required for printed circuit board (PCB) design of digital products according to the improvement in the speed of CPU operation in recent years. Especially, accurate power delivery network (PDN) information inside CPU is indispensable for PCB design according to requirement of low-impedance and the broadband (from DC to GHz) from the inside of CPU to DC-DC converter. While the detailed impedance information inside CPUs is not disclosed to PCB board designers with the complicated back-end and front-end production design for CPU chip and package. This paper aims to establish new methodology to extract CPU load model with combination of measurement and simulation. The method is simple yet powerful for high-end CPU board design.

DOI： 10.1109/ICPE.2015.7168125

Scopus

Other Link： https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84961904009&origin=inward

New Measurement Base De-embedded CPU Load Model for Power Delivery Network Design Reviewed

Motochika Okano, Koji Watanabe, Masamichi Naitoh, and Ichiro Omura

9th International Conference on Power Electronics ECCE Asia (ICPE 2015-ECCE Asia) 2015.06

60 GHz Wireless Signal Transmitting Gate Driver for IGBT Reviewed

Kenichi Yamamoto, Fumio Ichihara, Kazunori Hasegawa, Masanori Tsukuda, and Ichiro Omura

Proc. of ISPSD2015 133 - 136 2015.05

Ultrafast lateral 600 V silicon SOI PiN diode with geometric traps for preventing waveform oscillation Reviewed

Masanori Tsukuda, Hironori Imaki, Ichiro Omura

Solid State Electronics 104 61 - 69 2014.12

Short-circuit protection for an IGBT with detecting the gate voltage and gate charge Reviewed

K. Hasegawa, K. Yamamoto, H. Yoshida, K. Hamada, M. Tsukuda, I. Omura

Microelectronics Reliability 54 1897 - 1900 2014.09

Structure oriented compact model for advanced trench IGBTs without fitting parameters for extreme condition: part II Reviewed

J. Takaishi, S. Harada, M. Tsukuda, I. Omura

Microelectronics Reliability 54 1891 - 1896 2014.09

High Speed Real-time Temperature Monitoring System inside Power Devices Package Using Infrared Radiation Reviewed

N. Hirata, A. Watanabe and I. Omurae

The 2014 International Conference Solid State Devices and Materials 1016 - 1017 2014.09

Ultra-fast Lateral 600 V Silicon PiN Diode Superior to SiC-SBD Reviewed

Masanori Tsukuda, Hironori Imaki and Ichiro Omura

Proc. of ISPSD2014 31 - 31 2014.06

Rea-time failure monitoring system for high power IGBT under acceleration test up to 500A stress Reviewed

Akihiko Watanabe, Masanori Tsukuda and Ichiro Omura

Proc. of ISPSD2014 338 - 341 2014.06

Internal degradation monitoring of power devices during power cycling test Reviewed

Akihiko Watanabe, Masahiro Tsukuda and Ichiro Omura

International Conference on Integrated Power Electronics System 2014.02

High-throughput DBC-assembled IGBT screening for power module Reviewed

Masanori Tsukuda, Seiichi Okoda, Ryuzo Noda, Katsuji Tashiro and Ichiro Omura

International Conference on Integrated Power Electronics System 2014.02

Real-time failure monitoring system for high power IGBT under acceleration test up to 500 A stress Reviewed

Watanabe A., Omura I., Tsukuda M.

Proceedings of the International Symposium on Power Semiconductor Devices and ICs 338 - 341 2014.01

Language：English Publishing type：Research paper (international conference proceedings)

Real-time failure monitoring system for IGBT module was demonstrated under 500 A power cycling test. The system successfully captured internal phenomena occurred in interface regions of the device under test. Moreover, we proposed realtime failure analysis method by combining the real-time monitoring and image processing techniques. This failure analysis method enables to distinguish the place where degradation occurs in DUT and also trace internal degradation process to failure. © 2014 IEEE.

DOI： 10.1109/ISPSD.2014.6856045

Scopus

Other Link： https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84905457043&origin=inward

Ion-beam irradiation effect in the growth process of graphene on silicon carbide-on-insulator substrates Reviewed

Okano M., Edamoto D., Uchida K., Omura I., Ikari T., Nakao M., Naitoh M.

Materials Science Forum 778-780 1170 - 1173 2014.01

Language：English Publishing type：Research paper (international conference proceedings)

We investigated the effect of ion-beam irradiation of the 3C-SiC(111) surface on the growth of graphene by the SiC surface-decomposition method. When a 3C-SiC(111) surface was irradiated by 1 keV Ar ions at a dose of 4.5 × 10 cm in an ultra-high-vacuum chamber and then annealed at 1200 °C for 1 min, the formation of graphene layers was promoted in comparison with that in the absence of ion-beam irradiation. X-ray photoelectron spectroscopy studies showed that Ar ion bombardment of the 3C-SiC(111) caused breakage of surface bonds and helped Si atoms to desorb from the surface. © (2014) Trans Tech Publications, Switzerland. + 15 -2

DOI： 10.4028/www.scientific.net/MSF.778-780.1170

Scopus

Other Link： https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84896064430&origin=inward

Internal degradation monitoring of power devices during power cycling test Reviewed

Watanabe A., Tsukuda M., Omura I.

CIPS 2014 - 8th International Conference on Integrated Power Electronics Systems, Proceedings 2014.01

Language：English Publishing type：Research paper (international conference proceedings)

A technique to monitor internal degradation to failure of power devices in real time was proposed. Required components for this technique are (1) non-destructive inside imaging, (2) power stress control and (3) device cooling. We constructed the system with scanning acoustic tomography (SAT), DC power supply controlled by own made program and water cooling system, respectively. In the case of a TO-3P packaged MOSFET, propagation of internal degradations to failure was successfully recorded as time series data by using this system. At the present time, the system is modified for high power and large size IGBT modules.

Scopus

Other Link： https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85084020110&origin=inward

High-throughput DBC-assembled IGBT screening for power module Reviewed

Tsukuda M., Okoda S., Noda R., Tashiro K., Omura I.

CIPS 2014 - 8th International Conference on Integrated Power Electronics Systems, Proceedings 2014.01

Language：English Publishing type：Research paper (international conference proceedings)

High-throughput DBC-assembled IGBT screening equipment for a production line is under development in order to prevent early failure of power modules. The equipment has been planning to have automatic GO/NO GO judgment technology by high-throughput measurement of current signal distribution with non-contact sensor arrays with small coils over the bonding wires of IGBT chips. Basic technology and Prototypes of a sensor, an analog amplifier, digital compensation technology, a test head and power circuit have been almost completed. The authors will fabricate the sensor arrays and develop GO/NO GO judgement technology with the integration of a basic technology.

Scopus

Other Link： https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85084019987&origin=inward

Real time degradation monitoring system for high power IGBT module under power cycling test Reviewed

A. Watanabe, M. Tsukuda and I. Omura

Microelectronics Reliability ( 53 ) 1692 - 1696 2013.10

IGBT chip current imaging system by scanning local magnetic field Reviewed

Microelectronics Reliability ( 53 ) 1409 - 1412 2013.10

Real Time Monitoring System for Internal Process to Failure of High Power IGBT Reviewed

Akihiko Watanabe, Masanori Tsukuda and Ichiro Omura

The 2013 International Conference on Solid State Devices and Materials 1046 - 1047 M-2-4 2013.09

High Speed Turn-on Gate Driving for 4.5kV IEGT without Increase in PiN Diode Recovery Current Reviewed

Yamato Miki, Makoto Mukunoki, Takashi Matsuyoshi, Masanori Tsukuda, and Ichiro Omura

Proc. of ISPSD 347 - 350 8-4 2013.05

Sub-micron Junction Termination for 1200V Class Devices toward CMOS Process Compatibility Reviewed

Kota Seto, Hironori Imaki, Junpei Takaishi, Masahiro Tanaka, Masanori Tsukuda and Ichiro Omura

Proc. of ISPSD 281 - 284 HV-P7 2013.05

　 PREV - NEXT 　

<OMURA Ichiro>

Papers - OMURA Ichiro