研究者詳細 - 山脇　彰

論文 - 山脇　彰

分割表示181 件中 61 - 80 件目／全件表示 >>

Development of a Projection-type Simple Stereoscopic Display with a Touch Panel Functionality 査読有り国際誌

Ryosuke Sato,Akira Yamawaki

Proceedings of The 9th IIAE International Conference on Industrial Application Engineering 2021 (ICIAE2021) ( 産業応用工学会 ) 112 - 115 2021年03月

High-level synthesis-oriented program description method considering display output in embedded video image processing system 査読有り国際誌

Kohei Shinyamada,Akira Yamawaki

Proceedings of The Twenty-Sixth International Symposium on Artificial Life and Robotics 2021 (AROB 26th 2021) ( 人工生命とロボット国際学会 ) 388 - 393 2021年01月

Evaluation of communication performance between sensor nodes in a flexible and scalable sensor array 査読有り国際誌

Ryota Nakamura,Akira Yamawaki

Proceedings of The Twenty-Sixth International Symposium on Artificial Life and Robotics 2021 (AROB 26th 2021) ( 人工生命とロボット国際学会 ) 461 - 465 2021年01月

Background Scrolling in High-level Synthesis Oriented Game Programing Library 査読有り国際誌

Kilryong Lee,Akira Yamawaki

Proceedings of The Twenty-Sixth International Symposium on Artificial Life and Robotics 2021 (AROB 26th 2021) ( 人工生命とロボット国際学会 ) 414 - 417 2021年01月

Development of a simple verification environment using FPGA of image processing hardware created by High-Level-Synthesis 査読有り国際誌

Atsushi Shojima,Akira Yamawaki

Proceedings of The Twenty-Sixth International Symposium on Artificial Life and Robotics 2021 (AROB 26th 2021) ( 人工生命とロボット国際学会 ) 422 - 426 2021年01月

Development and Evaluation of Hardware Dynamic Link Library on FPGA running Linux 査読有り国際誌

Takuma Sono,Akira Yamawaki

Proceedings of The Twenty-Sixth International Symposium on Artificial Life and Robotics 2021 (AROB 26th 2021) ( 人工生命とロボット国際学会 ) 427 - 430 2021年01月

Investigation of Feasibility for FPGA based Zero Standby-power Type Sensor Node 査読有り国際誌

Akira Yamawaki

Proceedings of the 8th IIAE International Conference on Industrial Application Engineering 2020 (ICIAE2020) ( the Institute of Industrial Applications Engineers ) 265 - 268 2020年03月

Sensor Data Gathering Time from Multiple Zero Standby power-type Sensor Nodes Simultaneously Awaken 査読有り国際誌

Akira Yamawaki, Makoto Miyauchi, Seiich Serikawa

Proceedings of the 8th IIAE International Conference on Industrial Application Engineering 2020 (ICIAE2020) ( the Institute of Industrial Applications Engineers ) 171 - 175 2020年03月

Performance Improvement of Hardware by Series Duplicating Data Buffer for High-level Synthesis 査読有り国際誌

Moena Yamasaki, Akira Yamawaki

Proceedings of the 8th IIAE International Conference on Industrial Application Engineering 2020 (ICIAE2020) ( the Institute of Industrial Applications Engineers ) 176 - 181 2020年03月

Development of Histogram Equalization Hardware By High-level synthesis 査読有り国際誌

Akira Yamawaki, Makoto Miyauchi, Seiich Serikawa

Proceedings of the 8th IIAE International Conference on Industrial Application Engineering 2020 (ICIAE2020) ( the Institute of Industrial Applications Engineers ) 261 - 264 2020年03月

A performance evaluation of read/write burst transfer by high-level synthesizable software for the alpha blending processing 査読有り

Yamagata Y., Yamawaki A.

Artificial Life and Robotics 25 ( 2 ) 253 - 257 2020年01月

担当区分：責任著者記述言語：英語掲載種別：研究論文（学術雑誌）

© 2020, International Society of Artificial Life and Robotics (ISAROB). High-level synthesis, HLS is a technology to convert the software into the hardware automatically. It is expected as a technology that can greatly reduce the load of the hardware development. However, the current HLS that cannot convert the software not considered the hardware configuration into the optimum hardware. One of characteristics of the hardware to be considered is the burst transfer of memory access. In this paper, we evaluate the burst transfer with a subject of alpha blending processing as a theme. It is necessary to describe the program, so that the HLS tool can implicitly infer the burst transfer, because HLS tool does not have a pragma designating the burst transfer. We consider the description method of the program to infer the burst transfer and clarify the influence of read/write burst transfer on alpha blending.

DOI： 10.1007/s10015-020-00590-x

Scopus

その他リンク： https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85081391351&origin=inward

Development of Filled Circle Drawing in High-level Synthesis Oriented Game Programming Library 査読有り国際誌

Yuki Yamagata, Akira Yamawaki

Proceedings of 20th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT2019) ( IEEE ) 280 - 284 2019年12月

担当区分：責任著者記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

オーストラリアゴールドコースト 2019年12月05日 - 2019年12月07日

We are developing a high-level synthesizable software game library to realize high performance and low power mobile terminals executing game applications. High-level synthesis, HLS, is a technology that automatically converts software into hardware. Games developed by HLS oriented game software library are executed by high-speed and low-power hardware reconfigured on reconfigurable devices in mobile terminals. This paper develops a circle drawing processing as one of functions in HLS oriented game software library. We employ Michener's algorithm which is suitable for hardware implementation as a circle drawing algorithm because it just consists of simple integer operations. We also show the program description method so that HLS tool can convert the circle drawing processing based on Michener's algorithm to a good hardware module. The experiments evaluate the execution time and the amount of hardware of the hardware module HLS generated.

DOI： 10.1109/PDCAT46702.2019.00058

Scopus

その他リンク： https://www.scopus.com/inward/record.uri?eid=2-s2.0-85083221623&doi=10.1109%2fPDCAT46702.2019.00058&partnerID=40&md5=6cdf55dc987a247f1f11891406bfa90b

Effect of Parallel Processing by Duplicating Histogram in Automatic Image Binarization for High-level Synthesis 査読有り国際誌

Moena Yamasaki, Akira Yamawaki

Proceedings of 20th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT2019) ( IEEE ) 534 - 537 2019年12月

担当区分：責任著者記述言語：英語掲載種別：研究論文（国際会議プロシーディングス）

オーストラリアゴールドコースト 2019年12月05日 - 2019年12月07日

The high-level synthesis converting software to hardware automatically is one of the important technologies for significantly reducing the burden caused by developing hardware module. The embedded image processing products need the HLS to quickly implement a hardware module achieving high-performance with low-power consumption instead of software implementation for high-computational processing. However, the HLS tool cannot generate a hardware module with high-performance and low-power consumption expected when the software program without deep consideration about the hardware organization to be generated is input. This paper shows a software description method to extract some parallelisms by duplicating the histograms in the automatic image binarization which is called as Otsu's method in order to improve a performance of the hardware module HLS generates. The experimental results show the effect of our description method about the performance and the amount of hardware. We also discuss about a trade-off among the parallelism, performance and amount of hardware.

DOI： 10.1109/PDCAT46702.2019.00105

Scopus

その他リンク： https://www.scopus.com/inward/record.uri?eid=2-s2.0-85083184174&doi=10.1109%2fPDCAT46702.2019.00105&partnerID=40&md5=17695de156279fc5c76e9282bcea1c93

Duplicating same argument of function to realize efficient hardware for high-level synthesis 査読有り

Yamasaki M., Yamawaki A.

Artificial Life and Robotics 25 ( 2 ) 248 - 252 2019年11月

担当区分：責任著者記述言語：英語掲載種別：研究論文（学術雑誌）

© 2019, International Society of Artificial Life and Robotics (ISAROB). High-level synthesis (HLS) automatically converting software into hardware is a promising technology to reduce the design burden significantly. However, to use HLS technology efficiently, software program must be described considering the hardware organization that HLS tool will generate. We are developing the HLS image processing library. However, some caution is required when using HLS for programs that read images. When the same image is read through an argument of the function, the input port corresponding to this argument on the hardware generated by HLS tool may cause the port conflict. As a result, the image reading is made serialized and this serialization disturbs the performance of the data path well pipelined by the HLS tool. This paper shows how to write a software program to avoid this problem. In addition, we adapt this method to two image processing and evaluate the effect of our proposal to them.

DOI： 10.1007/s10015-019-00576-4

Scopus

その他リンク： https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85075883857&origin=inward

Description Method for High-level Synthesis of Histogram Generation and Their Evaluation 査読有り

Moena Yamasaki, Akira Yamawaki

IEIE Transactions on Smart Processing & Computing 8 ( 3 ) 178 - 185 2019年06月

Performance Evaluation of Dynamic Partial Reconfiguration on FPGA by Hardware Time Division Execution 査読有り国際誌

Satoshi Yonemitsu, Akira Yamawaki

Proceedings of the 7th IIAEInternational Conference on Industrial Application Engineering 2019 ( Institute of Industrial Applications Engineers ) 265 - 269 2019年03月

A Study of Dynamic Partial Reconfiguration on FPGA of High-level Synthesized Hardware 査読有り国際誌

Takuma Sono, Akira Yamawaki

Proceedings of the 7th IIAEInternational Conference on Industrial Application Engineering 2019 ( Institute of Industrial Applications Engineers ) 261 - 264 2019年03月

Implementation of a single device measuring two biological signals by using dynamic analog circuit reconfiguration 査読有り

Tetsuya Suematsu, Akira Yamawaki

Proceedings of The Twenty-Fourth International Symposium on Artificial Life and Robotics 2019 608 - 611 2019年01月

A Performance Evaluation of Read / Write Burst Transfer by High-level Synthesizable Software for the Alpha Blending Processing 査読有り

Yuki Yamagata, Akira Yamawaki

Proceedings of The Twenty-Fourth International Symposium on Artificial Life and Robotics 2019 563 - 566 2019年01月

Duplicating Same Argument of Function to Realize Efficient Hardware for High-level Synthesis 査読有り

Moena Yamasaki, Akira Yamawaki

Proceedings of The Twenty-Fourth International Symposium on Artificial Life and Robotics 2019 559 - 562 2019年01月

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