Faculty Profiles - WEN Xiaoqing

Papers - WEN Xiaoqing

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A Highly Robust and Low-Power Flip-Flop Cell With Complete Double-Node-Upset Tolerance for Aerospace Applications Reviewed International journal

Yan A., He Y., Niu X., Cui J., Ni T., Huang Z., Girard P., Wen X.

IEEE Design and Test 40 ( 4 ) 34 - 41 2023.08

Designs of BCD Adder Based on Excess-3 Code in Quantum-Dot Cellular Automata Reviewed International journal

Yan A., Liu R., Cui J., Ni T., Girard P., Wen X., Zhang J.

IEEE Transactions on Circuits and Systems II: Express Briefs 70 ( 6 ) 2256 - 2260 2023.06

LDAVPM: A Latch Design and Algorithm-Based Verification Protected Against Multiple-Node-Upsets in Harsh Radiation Environments Reviewed International journal

Yan A., Li Z., Cui J., Huang Z., Ni T., Girard P., Wen X.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 42 ( 6 ) 2069 - 2073 2023.06

Designs of Two Quadruple-Node-Upset Self-Recoverable Latches for Highly Robust Computing in Harsh Radiation Environments Reviewed International journal

Yan A., Li Z., Cui J., Huang Z., Ni T., Girard P., Wen X.

IEEE Transactions on Aerospace and Electronic Systems 59 ( 3 ) 2885 - 2897 2023.06

Energy-Efficient Multiple Network-on-Chip Architecture With Bandwidth Expansion Reviewed International journal

Zhou W., Ouyang Y., Xu D., Huang Z., Liang H., Wen X.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 31 ( 4 ) 442 - 455 2023.04

High Performance and DNU-Recovery Spintronic Retention Latch for Hybrid MTJ/CMOS Technology Reviewed International journal

Yan A., Zhou Z., Ding L., Cui J., Huang Z., Wen X., Girard P.

Proceedings -Design, Automation and Test in Europe, DATE 2023-April 2023.01

Designs of Level-Sensitive T Flip-Flops and Polar Encoders Based on Two XOR/XNOR Gates Reviewed International journal

Yan A., Liu R., Huang Z., Girard P., Wen X.

Electronics (Switzerland) 11 ( 10 ) 2022.05

Evaluation and Test of Production Defects in Hardened Latches Reviewed International journal

MA Ruijun, HOLST Stefan, WEN Xiaoqing, YAN Aibin, XU Hui

IEICE Transactions on Information and Systems ( The Institute of Electronics, Information and Communication Engineers ) E105D ( 5 ) 996 - 1009 2022.01

Language：English Publishing type：Research paper (scientific journal)

As modern CMOS circuits fabricated with advanced technology nodes are becoming more and more susceptible to soft-errors, many hardened latches have been proposed for reliable LSI designs. We reveal for the first time that production defects in such hardened latches can cause two serious problems: (1) these production defects are difficult to detect with conventional scan test and (2) these production defects can reduce the reliability of hardened latches. This paper systematically addresses these two problems with three major contributions: (1) Post-Test Vulnerability Factor (PTVF), a first-of-its-kind metric for quantifying the impact of production defects on hardened latches, (2) a novel Scan-Test-Aware Hardened Latch (STAHL) design that has the highest defect coverage compared to state-of-the-art hardened latch designs, and (3) an STAHL-based scan test procedure. Comprehensive simulation results demonstrate the accuracy of the proposed PTVF metric and the effectiveness of the STAHL-based scan test. As the first comprehensive study bridging the gap between hardened latch design and LSI testing, the findings of this paper will significantly improve the soft-error-related reliability of LSI designs for safety-critical applications.

DOI： 10.1587/transinf.2021EDP7216

Scopus

CiNii Research

Other Link： https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85131218056&origin=inward

MRCO: A Multi-ring Convergence Oscillator-based High-Efficiency True Random Number Generator Reviewed International journal

Ni T., Peng Q., Bian J., Yao L., Huang Z., Yan A., Wen X.

Proceedings of the 2022 Asian Hardware Oriented Security and Trust Symposium, AsianHOST 2022 2022.01

A Radiation-Hardened Non-Volatile Magnetic Latch with High Reliability and Persistent Storage Reviewed

Yan A., Dingl L., Zhou Z., Huang Z., Cui J., Girard P., Wen X.

Proceedings of the Asian Test Symposium 2022-November 1 - 6 2022.01

GPU-Accelerated Timing Simulation of Systolic-Array-Based AI Accelerators Reviewed International journal

Holst S., Bumun L., Wen X.

Proceedings of the Asian Test Symposium 2021-November 127 - 132 2021.01

MURLAV: A Multiple-Node-Upset Recovery Latch and Algorithm-Based Verification Method Reviewed International journal

Yan A., Li Z., Gao Z., Zhang J., Huang Z., Ni T., Cui J., Wang X., Girard P., Wen X.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 43 ( 7 ) 2205 - 2214 2024.07

A new die-level flexible design-for-test architecture for 3D stacked ICs Reviewed International journal

Zhang Q., Zhan W., Wen X.

Integration 97 2024.07

Efficient design approaches to CMOS full adder circuits Reviewed International journal

Yan A., Bao H., Jiang W., Cui J., Huang Z., Wen X.

Microelectronics Journal 149 2024.07

IDLD: Interlocked Dual-Circle Latch Design with Low Cost and Triple-Node-Upset-Recovery for Aerospace Applications Reviewed International journal

Yan A., Dong C., Guo X., Song J., Cui J., Ni T., Girard P., Wen X.

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI 19 - 24 2024.06

A Low-Area Overhead and Low-Delay Triple-Node-Upset Self-Recoverable Design Based on Stacked Transistors Reviewed International journal

Xu H., Li J., Ma R., Liang H., Liu C., Wang S., Wen X.

IEEE Transactions on Device and Materials Reliability 24 ( 2 ) 302 - 312 2024.06

FeMPIM: A FeFET-Based Multifunctional Processing-in-Memory Cell Reviewed International journal

Yan A., Chen Y., Gao Z., Ni T., Huang Z., Cui J., Girard P., Wen X.

IEEE Transactions on Circuits and Systems II: Express Briefs 71 ( 4 ) 2299 - 2303 2024.04

SwinT-ILT: Swin Transformer embedding end-To-end mask optimization model Reviewed International journal

Xu H., Qi P., Tang F., Ma R., Liang H., Huang Z., Wen X.

Journal of Micro/Nanopatterning, Materials and Metrology 23 ( 1 ) 2024.01

Nonvolatile Latch Designs With Node-Upset Tolerance and Recovery Using Magnetic Tunnel Junctions and CMOS Reviewed International journal

Yan A., Wang L., Cui J., Huang Z., Ni T., Girard P., Wen X.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 32 ( 1 ) 116 - 127 2024.01

NEST: A Quadruple-Node Upset Recovery Latch Design and Algorithm-Based Recovery Optimization Reviewed International journal

Huang Z., Sun L., Wang X., Liang H., Lu Y., Yan A., Pan J., Wen X.

IEEE Transactions on Aerospace and Electronic Systems 60 ( 4 ) 4590 - 4600 2024.01

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Papers - WEN Xiaoqing