Faculty Profiles - WEN Xiaoqing

Papers - WEN Xiaoqing

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Effective Switching Probability Calculation to Locate Hotspots in Logic Circuits Reviewed International journal

Utsunomiya T., Hoshino R., Miyase K., Lu S.K., Wen X., Kajihara S.

Proceedings - 2022 IEEE International Test Conference in Asia, ITC-Asia 2022 43 - 48 2022.01

Cost-Optimized and Robust Latch Hardened against Quadruple Node Upsets for Nanoscale CMOS Reviewed International journal

Yan A., Song S., Zhang J., Cui J., Huang Z., Ni T., Wen X., Girard P.

Proceedings - 2022 IEEE International Test Conference in Asia, ITC-Asia 2022 73 - 78 2022.01

A Low-Cost and Robust Latch Protected against Triple Node Upsets in Nanoscale CMOS based on Source-Drain Cross-Coupled Inverters Reviewed International journal

Yan A., Song S., Chen Y., Cui J., Huang Z., Wen X.

Proceedings of the IEEE Conference on Nanotechnology 2022-July 215 - 218 2022.01

A Cost-Effective TSV Repair Architecture for Clustered Faults in 3-D IC Reviewed International journal

Ni T., Xu Q., Huang Z., Liang H., Yan A., Wen X.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 40 ( 9 ) 1952 - 1956 2021.09

Design of Radiation Hardened Latch and Flip-Flop with Cost-Effectiveness for Low-Orbit Aerospace Applications Reviewed International journal

Yan A., Cao A., Xu Z., Cui J., Ni T., Girard P., Wen X.

Journal of Electronic Testing: Theory and Applications (JETTA) 37 ( 4 ) 489 - 502 2021.08

A 4NU-Recoverable and HIS-Insensitive Latch Design for Highly Robust Computing in Harsh Radiation Environments Reviewed

Yan A., Cao A., Fan Z., Xu Z., Ni T., Girard P., Wen X.

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI 301 - 306 2021.06

Dual-modular-redundancy and dual-level error-interception based triple-node-upset tolerant latch designs for safety-critical applications Reviewed

Yan A., He Z., Zhou J., Cui J., Ni T., Huang Z., Wen X., Girard P.

Microelectronics Journal 111 2021.05

A novel TDMA-based fault tolerance technique for the TSVs in 3D-ICs using honeycomb topology Reviewed

Ni T., Yang Z., Chang H., Zhang X., Lu L., Yan A., Huang Z., Wen X.

IEEE Transactions on Emerging Topics in Computing 9 ( 2 ) 724 - 734 2021.04

Reliability-Driven Neuromorphic Computing Systems Design Reviewed

Xu Q., Wang J., Geng H., Chen S., Wen X.

Proceedings -Design, Automation and Test in Europe, DATE 2021-February 1586 - 1591 2021.02

TPDICE and SIM based 4-node-upset completely hardened latch design for highly robust computing in harsh radiation Reviewed

Yan A., Ding L., Shan C., Cai H., Chen X., Wei Z., Huang Z., Wen X.

Proceedings - IEEE International Symposium on Circuits and Systems 2021-May 2021.01

On the efficacy of scan chain grouping for mitigating IR-drop-induced test data corruption Reviewed

Zhang Y., Holst S., Wen X., Miyase K., Kajihara S., Qian J.

IEICE Transactions on Information and Systems ( The Institute of Electronics, Information and Communication Engineers ) E104D ( 6 ) 816 - 827 2021.01

Language：English Publishing type：Research paper (scientific journal)

<p>Loading test vectors and unloading test responses in shift mode during scan testing cause many scan flip-flops to switch simultaneously. The resulting shift switching activity around scan flip-flops can cause excessive local IR-drop that can change the states of some scan flip-flops, leading to test data corruption. A common approach solving this problem is partial-shift, in which multiple scan chains are formed and only one group of the scan chains is shifted at a time. However, previous methods based on this approach use random grouping, which may reduce global shift switching activity, but may not be optimized to reduce local shift switching activity, resulting in remaining high risk of test data corruption even when partial-shift is applied. This paper proposes novel algorithms (one optimal and one heuristic) to group scan chains, focusing on reducing local shift switching activity around scan flip-flops, thus reducing the risk of test data corruption. Experimental results on all large ITC'99 benchmark circuits demonstrate the effectiveness of the proposed optimal and heuristic algorithms as well as the scalability of the heuristic algorithm.</p>

DOI： 10.1587/transinf.2020EDP7042

Scopus

CiNii Article

CiNii Research

Other Link： https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85107932665&origin=inward

Novel Low Cost, Double-and-Triple-Node-Upset-Tolerant Latch Designs for Nano-scale CMOS Reviewed

Yan A., Lai C., Zhang Y., Cui J., Huang Z., Song J., Guo J., Wen X.

IEEE Transactions on Emerging Topics in Computing 9 ( 1 ) 520 - 533 2021.01

Cellular Structure Based Fault-Tolerance TSV Configuration in 3D-IC Reviewed

Xu Q., Sun W., Chen S., Kang Y., Wen X.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 41 ( 5 ) 1196 - 1208 2021.01

Parallel DICE Cells and Dual-Level CEs based 3-Node-Upset Tolerant Latch Design for Highly Robust Computing Reviewed International journal

Yan A., Zhai Z., Wang L., Zhang J., Cui N., Ni T., Wen X.

Proceedings - 2021 IEEE International Test Conference in Asia, ITC-Asia 2021 2021.01

LSI Testing: A Core Technology to a Successful LSI Industry Invited Reviewed International journal

Wen X.

Proceedings of International Conference on ASIC 2021.01

GoodFloorplan: Graph Convolutional Network and Reinforcement Learning Based Floorplanning Reviewed International journal

Xu Q., Geng H., Chen S., Yuan B., Zhuo C., Kang Y., Wen X.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 41 ( 10 ) 3492 - 3502 2021.01

Fortune: A New Fault-Tolerance TSV Configuration in Router-based Redundancy Structure Reviewed International journal

Xu Q., Ni T., Geng H., Chen S., Yu B., Kang Y., Wen X.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 41 ( 10 ) 3182 - 3187 2021.01

A Sextuple Cross-Coupled Dual-Interlocked-Storage-Cell based Multiple-Node-Upset Self-Recoverable Latch Reviewed International journal

Yan A., Qian K., Cui J., Cui N., Ni T., Huang Z., Wen X.

2021 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2021 2021.01

A Reliable and Low-Cost Flip-Flop Hardened against Double-Node-Upsets Reviewed International journal

Yan A., Cao A., Qian K., Ding L., He Z., Fan Z., Wen X.

Proceedings - 2021 8th International Conference on Dependable Systems and Their Applications, DSA 2021 734 - 736 2021.01

Novel Speed-and-Power-Optimized SRAM Cell Designs with Enhanced Self-Recoverability from Single- And Double-Node Upsets Reviewed

Yan A., Chen Y., Hu Y., Zhou J., Ni T., Cui J., Girard P., Wen X.

IEEE Transactions on Circuits and Systems I: Regular Papers 67 ( 12 ) 4684 - 4695 2020.12

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Papers - WEN Xiaoqing