論文 - 温 暁青
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A Novel Per-Test Fault Diagnosis Method Based On the Extended X-Fault Model for Deep-Submicron LSI Circuits 査読有り 国際誌
Y. Yamato,Y. Nakamura,K. Miyase,X. Wen,and S. Kajihara
IEICE Transactions on Information and Systems E91-D ( 3 ) 667 - 674 2008年03月
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Low Capture Switching Activity Test Generation for Reducing IR-Drop in At-Speed Scan Testing 査読有り 国際誌
X. Wen,K. Miyase,T. Suzuki,S. Kajiihara,L.-T. Wang,K. K. Saluja,K. Kinoshita
Journal of Electronic Testing: Theory and Applications, Special Issue on Low Power Testing 24 ( 4 ) 379 - 391 2008年01月
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Estimation of Delay Test Quality and Its Application to Test Generation 査読有り 国際誌
S. Kajihara,S. Morishima,M. Yamamoto,X. Wen,M. Fukunaga,K. Hatayama,and T. Aikyo
IEEE/ACM International Conference on Computer Aided Design 413 - 417 2007年11月
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A Method for Improving the Bridging Defect Coverage of a Transition Delay Test Set 査読有り 国際誌
K. Miyase,X. Wen,S. Kajihara,M. Haraguchi,H. Furukawa
IEEE International Workshop on Defect Based Testing 51 - 56 2007年10月
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A Novel Scheme to Reduce Power Supply Noise for High-Quality At-Speed Scan Testing 査読有り 国際誌
X. Wen,K. Miyase,S. Kajihara,T. Suzuki,Y. Yamato,P. Girard,Y. Ohsumi,and L.-T. Wang
IEEE International Test Conference 25.1 2007年10月
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A Novel ATPG Method for Capture Power Reduction During Scan Testing 査読有り 国際誌
X. Wen,S. Kajiihara,K. Miyase,T. Suzuki,K. K. Saluja,L.-T. Wang,K. Kinoshita
IEICE Transactions on Information and Systems E90-D ( 9 ) 1398 - 1405 2007年09月
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Critical-Path-Aware X-Filling for Effective IR-Drop Reduction in At-Speed Scan Testing 査読有り 国際誌
X. Wen,K. Miyase,T. Suzuki,S. Kajihara,Y. Ohsumi,K. K. Saluja
IEEE/ACM Design Automation Conference 527 - 532 2007年06月
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An Improved Method of Per-Test X-Fault Diagnosis for Deep-Submicron LSI Circuits 査読有り 国際誌
X. Wen,Y. Yamato,K. Miyase,S. Kajihara,L.-T. Wang,K. K. Saluja,K. Kinoshita
IEEE Workshop on RTL and High Level Testing 55 - 60 2006年11月
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Test Data Compression Based on Clustered Random Access Scan 査読有り 国際誌
Y. Hu,C. Li,J. Li,Y. Han,X. Li,W. Wang,H. Li,L.-T. Wang,X. Wen
IEEE Asian Test Symposium 231 - 236 2006年11月
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A Per-Test Fault Diagnosis Method Based on the X-Fault Model 査読有り 国際誌
X. Wen,S. Kajiihara,K. Miyase,Y. Yamato,L.-T. Wang,K. K. Saluja,K. Kinoshita
IEICE Transactions on Information and Systems E89-D ( 11 ) 2756 - 2765 2006年11月
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A Framework of High-quality Transition Fault ATPG for Scan Circuits 査読有り 国際誌
S. Kajihara,S. Morishima,A. Takuma,X. Wen,T. Maeda,S. Hamada,Y. Sato
IEEE International Test Conference Paper 2.1 2006年10月
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A Novel and Practical Control Scheme for Inter-Clock At-Speed Testing 査読有り 国際誌
H. Furukawa,X. Wen,L.-T. Wang,B. Sheu,Z. Jiang,S. Wu
IEEE International Test Conference Paper 17.2 2006年10月
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Compression/Scan Co-Design for Reducing Test Data Volume, Scan-in Power Dissipation, and Test Application Time 査読有り 国際誌
Y. Hu,Y. Han,X. Li,H. Li,X. Wen
IEICE Transactions on Information and Systems E89-D ( 10 ) 2616 - 2625 2006年10月
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A Highly-Guided X-Filling Method for Effective Low-Capture-Power Scan Test Generation 査読有り 国際誌
X. Wen,K. Miyase,T. Suzuki,Y. Yamato,S. Kajihara,L.-T. Wang,K. K. Saluja
IEEE International Conference on Computer Design 251 - 258 2006年10月
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Hybrid Fault Simulation with Compiled and Event-Driven Methods 査読有り 国際誌
K. Taniguchi,H. Fujii,S. Kajihara,X. Wen
IEEE International Conference on Design & Test of Integrated Systems in Nanoscale Technology 240 - 243 2006年09月
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A New Method for Low-Capture-Power Test Generation for Scan Testing 査読有り 国際誌
X. Wen,Y. Yamashita,S. Kajiihara,L.-T. Wang,K. K. Saluja,K. Kinoshita
IEICE Transactions on Information and Systems E89-D ( 5 ) 1679 - 1686 2006年05月
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A New ATPG Method for Efficient Capture Power Reduction During Scan Testing 査読有り 国際誌
X. Wen,S. Kajihara,K. Miyase,T. Suzuki,K. K. Saluja,L.-T. Wang,K. S. Abdel-Hafez,K. Kinoshita
IEEE VLSI Test Symposium 58 - 63 2006年04月
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A Dynamic Test Compaction Procedure for High-quality Path Delay Testing 査読有り 国際誌
M. Fukunaga,S. Kajihara,X. Wen,T. Maeda,S. Hamada,Y. Sato
IEEE/ACM Asian and South Pacific Design Automation Conference 348 - 353 2006年01月
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On Improving Defect Coverage of Stuck-at Fault Tests 査読有り 国際誌
K. Miyase, K. Terashima, S. Kajihara, X. Wen, S. M. Reddy
IEEE Asian Test Symposium 216 - 223 2005年12月
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Compression/Scan Co-Design for Reducing Test Data Volume, Scan-In Power Dissipation and Test Application Time 査読有り 国際誌
Y. Hu, Y. Han, X. Li, H. Li, X. Wen
IEEE Pacific Rim International Symposium on Dependable Computing 8 - 8 2005年12月